arch/arm/boot/dts/dra7-evm-common.dtsi

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
 */

#include "dra74-ipu-dsp-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/ti-dra7-atl.h>
#include <dt-bindings/input/input.h>

/ {
	chosen {
		stdout-path = &uart1;
	};

	extcon_usb1: extcon_usb1 {
		compatible = "linux,extcon-usb-gpio";
		id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
	};

	extcon_usb2: extcon_usb2 {
		compatible = "linux,extcon-usb-gpio";
		id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
	};

	sound0: sound0 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "DRA7xx-EVM";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Line", "Line Out",
			"Microphone", "Mic Jack",
			"Line", "Line In";
		simple-audio-card,routing =
			"Headphone Jack",	"HPLOUT",
			"Headphone Jack",	"HPROUT",
			"Line Out",		"LLOUT",
			"Line Out",		"RLOUT",
			"MIC3L",		"Mic Jack",
			"MIC3R",		"Mic Jack",
			"Mic Jack",		"Mic Bias",
			"LINE1L",		"Line In",
			"LINE1R",		"Line In";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound0_master>;
		simple-audio-card,frame-master = <&sound0_master>;
		simple-audio-card,bitclock-inversion;

		sound0_master: simple-audio-card,cpu {
			sound-dai = <&mcasp3>;
			system-clock-frequency = <5644800>;
		};

		simple-audio-card,codec {
			sound-dai = <&tlv320aic3106>;
			clocks = <&atl_clkin2_ck>;
		};
	};

	leds {
		compatible = "gpio-leds";
		led0 {
			label = "dra7:usr1";
			gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led1 {
			label = "dra7:usr2";
			gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led2 {
			label = "dra7:usr3";
			gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		led3 {
			label = "dra7:usr4";
			gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		#address-cells = <1>;
		#size-cells = <0>;
		autorepeat;

		USER1 {
			label = "btnUser1";
			linux,code = <BTN_0>;
			gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
		};

		USER2 {
			label = "btnUser2";
			linux,code = <BTN_1>;
			gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
		};
	};
};

&i2c3 {
	status = "okay";
	clock-frequency = <400000>;
};

&mcspi1 {
	status = "okay";
};

&mcspi2 {
	status = "okay";
};

&uart1 {
	status = "okay";
	interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
			      <&dra7_pmx_core 0x3e0>;
};

&uart2 {
	status = "okay";
};

&uart3 {
	status = "okay";
};

&qspi {
	status = "okay";

	spi-max-frequency = <76800000>;
	flash@0 {
		compatible = "s25fl256s1";
		spi-max-frequency = <76800000>;
		reg = <0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		/* MTD partition table.
		 * The ROM checks the first four physical blocks
		 * for a valid file to boot and the flash here is
		 * 64KiB block size.
		 */
		partition@0 {
			label = "QSPI.SPL";
			reg = <0x00000000 0x000010000>;
		};
		partition@1 {
			label = "QSPI.SPL.backup1";
			reg = <0x00010000 0x00010000>;
		};
		partition@2 {
			label = "QSPI.SPL.backup2";
			reg = <0x00020000 0x00010000>;
		};
		partition@3 {
			label = "QSPI.SPL.backup3";
			reg = <0x00030000 0x00010000>;
		};
		partition@4 {
			label = "QSPI.u-boot";
			reg = <0x00040000 0x00100000>;
		};
		partition@5 {
			label = "QSPI.u-boot-spl-os";
			reg = <0x00140000 0x00080000>;
		};
		partition@6 {
			label = "QSPI.u-boot-env";
			reg = <0x001c0000 0x00010000>;
		};
		partition@7 {
			label = "QSPI.u-boot-env.backup1";
			reg = <0x001d0000 0x0010000>;
		};
		partition@8 {
			label = "QSPI.kernel";
			reg = <0x001e0000 0x0800000>;
		};
		partition@9 {
			label = "QSPI.file-system";
			reg = <0x009e0000 0x01620000>;
		};
	};
};

&omap_dwc3_1 {
	extcon = <&extcon_usb1>;
};

&usb1 {
	dr_mode = "otg";
	extcon = <&extcon_usb1>;
};

&omap_dwc3_2 {
	extcon = <&extcon_usb2>;
};

&usb2 {
	dr_mode = "host";
	extcon = <&extcon_usb2>;
};

&atl {
	assigned-clocks = <&abe_dpll_sys_clk_mux>,
			  <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>,
			  <&dpll_abe_ck>,
			  <&dpll_abe_m2x2_ck>,
			  <&atl_clkin2_ck>;
	assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
	assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;

	status = "okay";

	atl2 {
		bws = <DRA7_ATL_WS_MCASP2_FSX>;
		aws = <DRA7_ATL_WS_MCASP3_FSX>;
	};
};

&mcasp3 {
	#sound-dai-cells = <0>;

	assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
	assigned-clock-parents = <&atl_clkin2_ck>;

	status = "okay";

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;
	/* 4 serializer */
	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
		1 2 0 0
	>;
	tx-num-evt = <32>;
	rx-num-evt = <32>;
};

&pcie1_rc {
	status = "okay";
};

&mmc4 {
	bus-width = <4>;
	cap-power-off-card;
	keep-power-in-suspend;
	non-removable;
	#address-cells = <1>;
	#size-cells = <0>;
	wifi@2 {
		compatible = "ti,wl1835";
		reg = <2>;
		interrupt-parent = <&gpio5>;
		interrupts = <7 IRQ_TYPE_EDGE_RISING>;
	};
};