| // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) |
| /* |
| * Copyright 2018-2022 TQ-Systems GmbH |
| * Author: Markus Niebel <Markus.Niebel@tq-group.com> |
| */ |
| |
| /* |
| * Common for |
| * - TQMa6ULx |
| * - TQMa6ULLx |
| */ |
| |
| &m24c64_50 { |
| vcc-supply = <®_sw2>; |
| }; |
| |
| &m24c02_52 { |
| vcc-supply = <®_sw2>; |
| }; |
| |
| ®_sw2 { |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| /* eMMC */ |
| &usdhc2 { |
| vmmc-supply = <®_sw2>; |
| vqmmc-supply = <®_vldo4>; |
| }; |
| |
| &iomuxc { |
| pinctrl_qspi: qspigrp { |
| fsl,pins = < |
| MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70b9 |
| MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70b9 |
| MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70b9 |
| MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70b9 |
| MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70b9 |
| MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 |
| >; |
| }; |
| }; |