| Qualcomm Hexagon Peripheral Image Loader |
| |
| This document defines the binding for a component that loads and boots firmware |
| on the Qualcomm Hexagon core. |
| |
| - compatible: |
| Usage: required |
| Value type: <string> |
| Definition: must be one of: |
| "qcom,q6v5-pil", |
| "qcom,ipq8074-wcss-pil" |
| "qcom,msm8916-mss-pil", |
| "qcom,msm8974-mss-pil" |
| "qcom,msm8996-mss-pil" |
| "qcom,msm8998-mss-pil" |
| "qcom,sdm845-mss-pil" |
| |
| - reg: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: must specify the base address and size of the qdsp6 and |
| rmb register blocks |
| |
| - reg-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "q6dsp" and "rmb" |
| |
| - interrupts-extended: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: reference to the interrupts that match interrupt-names |
| |
| - interrupt-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: The interrupts needed depends on the the compatible |
| string: |
| qcom,q6v5-pil: |
| qcom,ipq8074-wcss-pil: |
| qcom,msm8916-mss-pil: |
| qcom,msm8974-mss-pil: |
| must be "wdog", "fatal", "ready", "handover", "stop-ack" |
| qcom,msm8996-mss-pil: |
| qcom,msm8998-mss-pil: |
| qcom,sdm845-mss-pil: |
| must be "wdog", "fatal", "ready", "handover", "stop-ack", |
| "shutdown-ack" |
| |
| - firmware-name: |
| Usage: optional |
| Value type: <stringlist> |
| Definition: must list the relative firmware image paths for mba and |
| modem. They are used for booting and authenticating the |
| Hexagon core. |
| |
| - clocks: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the clocks that match clock-names |
| |
| - clock-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: The clocks needed depend on the compatible string: |
| qcom,ipq8074-wcss-pil: |
| no clock names required |
| qcom,q6v5-pil: |
| qcom,msm8916-mss-pil: |
| qcom,msm8974-mss-pil: |
| must be "iface", "bus", "mem", "xo" |
| qcom,msm8996-mss-pil: |
| must be "iface", "bus", "mem", "xo", "gpll0_mss", |
| "snoc_axi", "mnoc_axi", "pnoc", "qdss" |
| qcom,msm8998-mss-pil: |
| must be "iface", "bus", "mem", "xo", "gpll0_mss", |
| "snoc_axi", "mnoc_axi", "qdss" |
| qcom,sdm845-mss-pil: |
| must be "iface", "bus", "mem", "xo", "gpll0_mss", |
| "snoc_axi", "mnoc_axi", "prng" |
| |
| - resets: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the reset-controller for the modem sub-system |
| reference to the list of 3 reset-controllers for the |
| wcss sub-system |
| reference to the list of 2 reset-controllers for the modem |
| sub-system on SDM845 SoCs |
| |
| - reset-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "mss_restart" for the modem sub-system |
| must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" |
| for the wcss sub-system |
| must be "mss_restart", "pdc_reset" for the modem |
| sub-system on SDM845 SoCs |
| |
| For the compatible strings below the following supplies are required: |
| "qcom,q6v5-pil" |
| "qcom,msm8916-mss-pil", |
| - cx-supply: |
| - mx-supply: |
| - pll-supply: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the regulators to be held on behalf of the |
| booting of the Hexagon core |
| |
| For the compatible string below the following supplies are required: |
| "qcom,msm8974-mss-pil" |
| - cx-supply: |
| - mss-supply: |
| - mx-supply: |
| - pll-supply: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the regulators to be held on behalf of the |
| booting of the Hexagon core |
| |
| For the compatible string below the following supplies are required: |
| "qcom,msm8996-mss-pil" |
| - pll-supply: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the regulators to be held on behalf of the |
| booting of the Hexagon core |
| |
| - power-domains: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to power-domains that match power-domain-names |
| |
| - power-domain-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: The power-domains needed depend on the compatible string: |
| qcom,q6v5-pil: |
| qcom,ipq8074-wcss-pil: |
| qcom,msm8916-mss-pil: |
| qcom,msm8974-mss-pil: |
| no power-domain names required |
| qcom,msm8996-mss-pil: |
| qcom,msm8998-mss-pil: |
| must be "cx", "mx" |
| qcom,sdm845-mss-pil: |
| must be "cx", "mx", "mss", "load_state" |
| |
| - qcom,smem-states: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the smem state for requesting the Hexagon to |
| shut down |
| |
| - qcom,smem-state-names: |
| Usage: required |
| Value type: <stringlist> |
| Definition: must be "stop" |
| |
| - qcom,halt-regs: |
| Usage: required |
| Value type: <prop-encoded-array> |
| Definition: a phandle reference to a syscon representing TCSR followed |
| by the three offsets within syscon for q6, modem and nc |
| halt registers. |
| |
| = SUBNODES: |
| The Hexagon node must contain two subnodes, named "mba" and "mpss" representing |
| the memory regions used by the Hexagon firmware. Each sub-node must contain: |
| |
| - memory-region: |
| Usage: required |
| Value type: <phandle> |
| Definition: reference to the reserved-memory for the region |
| |
| The Hexagon node may also have an subnode named either "smd-edge" or |
| "glink-edge" that describes the communication edge, channels and devices |
| related to the Hexagon. See ../soc/qcom/qcom,smd.txt and |
| ../soc/qcom/qcom,glink.txt for details on how to describe these. |
| |
| = EXAMPLE |
| The following example describes the resources needed to boot control the |
| Hexagon, as it is found on MSM8974 boards. |
| |
| modem-rproc@fc880000 { |
| compatible = "qcom,q6v5-pil"; |
| reg = <0xfc880000 0x100>, |
| <0xfc820000 0x020>; |
| reg-names = "qdsp6", "rmb"; |
| |
| interrupts-extended = <&intc 0 24 1>, |
| <&modem_smp2p_in 0 0>, |
| <&modem_smp2p_in 1 0>, |
| <&modem_smp2p_in 2 0>, |
| <&modem_smp2p_in 3 0>; |
| interrupt-names = "wdog", |
| "fatal", |
| "ready", |
| "handover", |
| "stop-ack"; |
| |
| clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, |
| <&gcc GCC_MSS_CFG_AHB_CLK>, |
| <&gcc GCC_BOOT_ROM_AHB_CLK>; |
| clock-names = "iface", "bus", "mem"; |
| |
| qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; |
| |
| resets = <&gcc GCC_MSS_RESTART>; |
| reset-names = "mss_restart"; |
| |
| cx-supply = <&pm8841_s2>; |
| mss-supply = <&pm8841_s3>; |
| mx-supply = <&pm8841_s1>; |
| pll-supply = <&pm8941_l12>; |
| |
| qcom,smem-states = <&modem_smp2p_out 0>; |
| qcom,smem-state-names = "stop"; |
| |
| mba { |
| memory-region = <&mba_region>; |
| }; |
| |
| mpss { |
| memory-region = <&mpss_region>; |
| }; |
| }; |