arch/mips/boot/dts/brcm/bcm63268.dtsi

// SPDX-License-Identifier: GPL-2.0

#include "dt-bindings/clock/bcm63268-clock.h"
#include "dt-bindings/reset/bcm63268-reset.h"
#include "dt-bindings/soc/bcm63268-pm.h"

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "brcm,bcm63268";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		mips-hpt-frequency = <200000000>;

		cpu@0 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,bmips4350";
			device_type = "cpu";
			reg = <1>;
		};
	};

	clocks {
		periph_osc: periph-osc {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;
			clock-output-names = "periph";
		};

		hsspi_osc: hsspi-osc {
			compatible = "fixed-clock";

			#clock-cells = <0>;

			clock-frequency = <400000000>;
			clock-output-names = "hsspi_osc";
		};
	};

	aliases {
		nflash = &nflash;
		serial0 = &uart0;
		serial1 = &uart1;
		spi0 = &lsspi;
		spi1 = &hsspi;
	};

	cpu_intc: interrupt-controller {
		#address-cells = <0>;
		compatible = "mti,cpu-interrupt-controller";

		interrupt-controller;
		#interrupt-cells = <1>;
	};

	ubus {
		#address-cells = <1>;
		#size-cells = <1>;

		compatible = "simple-bus";
		ranges;

		periph_clk: clock-controller@10000004 {
			compatible = "brcm,bcm63268-clocks";
			reg = <0x10000004 0x4>;
			#clock-cells = <1>;
		};

		pll_cntl: syscon@10000008 {
			compatible = "syscon";
			reg = <0x10000008 0x4>;
			native-endian;

			reboot {
				compatible = "syscon-reboot";
				offset = <0x0>;
				mask = <0x1>;
			};
		};

		periph_rst: reset-controller@10000010 {
			compatible = "brcm,bcm6345-reset";
			reg = <0x10000010 0x4>;
			#reset-cells = <1>;
		};

		periph_intc: interrupt-controller@10000020 {
			compatible = "brcm,bcm6345-l1-intc";
			reg = <0x10000020 0x20>,
			      <0x10000040 0x20>;

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpu_intc>;
			interrupts = <2>, <3>;
		};

		timer-mfd@10000080 {
			compatible = "brcm,bcm7038-twd", "simple-mfd", "syscon";
			reg = <0x10000080 0x30>;
			ranges = <0x0 0x10000080 0x30>;
			#address-cells = <1>;
			#size-cells = <1>;

			timer@0 {
				compatible = "brcm,bcm6345-timer";
				reg = <0x0 0x1c>;
			};

			wdt: watchdog@1c {
				compatible = "brcm,bcm7038-wdt";
				reg = <0x1c 0xc>;

				clocks = <&periph_osc>;
				clock-names = "refclk";

				timeout-sec = <30>;
			};
		};

		uart0: serial@10000180 {
			compatible = "brcm,bcm6345-uart";
			reg = <0x10000180 0x18>;

			interrupt-parent = <&periph_intc>;
			interrupts = <5>;

			clocks = <&periph_osc>;
			clock-names = "refclk";

			status = "disabled";
		};

		nflash: nand@10000200 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,nand-bcm6368",
				     "brcm,brcmnand-v4.0",
				     "brcm,brcmnand";
			reg = <0x10000200 0x180>,
			      <0x10000600 0x200>,
			      <0x100000b0 0x10>;
			reg-names = "nand",
				    "nand-cache",
				    "nand-int-base";

			interrupt-parent = <&periph_intc>;
			interrupts = <50>;

			clocks = <&periph_clk BCM63268_CLK_NAND>;
			clock-names = "nand";

			status = "disabled";
		};

		uart1: serial@100001a0 {
			compatible = "brcm,bcm6345-uart";
			reg = <0x100001a0 0x18>;

			interrupt-parent = <&periph_intc>;
			interrupts = <34>;

			clocks = <&periph_osc>;
			clock-names = "refclk";

			status = "disabled";
		};

		lsspi: spi@10000800 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,bcm6358-spi";
			reg = <0x10000800 0x70c>;

			interrupt-parent = <&periph_intc>;
			interrupts = <80>;

			clocks = <&periph_clk BCM63268_CLK_SPI>;
			clock-names = "spi";

			resets = <&periph_rst BCM63268_RST_SPI>;

			status = "disabled";
		};

		hsspi: spi@10001000 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,bcm6328-hsspi";
			reg = <0x10001000 0x600>;

			interrupt-parent = <&periph_intc>;
			interrupts = <6>;

			clocks = <&periph_clk BCM63268_CLK_HSSPI>,
				 <&hsspi_osc>;
			clock-names = "hsspi",
				      "pll";

			resets = <&periph_rst BCM63268_RST_SPI>;

			status = "disabled";
		};

		periph_pwr: power-controller@1000184c {
			compatible = "brcm,bcm6328-power-controller";
			reg = <0x1000184c 0x4>;
			#power-domain-cells = <1>;
		};

		leds0: led-controller@10001900 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "brcm,bcm6328-leds";
			reg = <0x10001900 0x24>;

			status = "disabled";
		};

		ehci: usb@10002500 {
			compatible = "brcm,bcm63268-ehci", "generic-ehci";
			reg = <0x10002500 0x100>;
			big-endian;

			interrupt-parent = <&periph_intc>;
			interrupts = <10>;

			phys = <&usbh 0>;
			phy-names = "usb";

			status = "disabled";
		};

		ohci: usb@10002600 {
			compatible = "brcm,bcm63268-ohci", "generic-ohci";
			reg = <0x10002600 0x100>;
			big-endian;
			no-big-frame-no;

			interrupt-parent = <&periph_intc>;
			interrupts = <9>;

			phys = <&usbh 0>;
			phy-names = "usb";

			status = "disabled";
		};

		usbh: usb-phy@10002700 {
			compatible = "brcm,bcm63268-usbh-phy";
			reg = <0x10002700 0x38>;
			#phy-cells = <1>;

			clocks = <&periph_clk BCM63268_CLK_USBH>;
			clock-names = "usbh";

			power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;

			resets = <&periph_rst BCM63268_RST_USBH>;
			reset-names = "usbh";

			status = "disabled";
		};
	};
};