| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * support for the bosch am335x based shc c3 board |
| * |
| * Copyright, C) 2015 Heiko Schocher <hs@denx.de> |
| * |
| */ |
| /dts-v1/; |
| |
| #include "am33xx.dtsi" |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| model = "Bosch SHC"; |
| compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx"; |
| |
| aliases { |
| mmcblk0 = &mmc1; |
| mmcblk1 = &mmc2; |
| }; |
| |
| cpus { |
| cpu@0 { |
| /* |
| * To consider voltage drop between PMIC and SoC, |
| * tolerance value is reduced to 2% from 4% and |
| * voltage value is increased as a precaution. |
| */ |
| operating-points = < |
| /* kHz uV */ |
| 594000 1225000 |
| 294000 1125000 |
| >; |
| voltage-tolerance = <2>; /* 2 percentage */ |
| cpu0-supply = <&dcdc2_reg>; |
| }; |
| }; |
| |
| gpio_keys { |
| compatible = "gpio-keys"; |
| |
| back_button { |
| label = "Back Button"; |
| gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; |
| linux,code = <KEY_BACK>; |
| debounce-interval = <1000>; |
| wakeup-source; |
| }; |
| |
| front_button { |
| label = "Front Button"; |
| gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; |
| linux,code = <KEY_FRONT>; |
| debounce-interval = <1000>; |
| wakeup-source; |
| }; |
| }; |
| |
| leds { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&user_leds_s0>; |
| |
| compatible = "gpio-leds"; |
| |
| led1 { |
| label = "shc:power:red"; |
| gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>; |
| default-state = "off"; |
| }; |
| |
| led2 { |
| label = "shc:power:bl"; |
| gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "timer"; |
| default-state = "on"; |
| }; |
| |
| led3 { |
| label = "shc:lan:red"; |
| gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; |
| default-state = "off"; |
| }; |
| |
| led4 { |
| label = "shc:lan:bl"; |
| gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; |
| default-state = "off"; |
| }; |
| |
| led5 { |
| label = "shc:cloud:red"; |
| gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
| default-state = "off"; |
| }; |
| |
| led6 { |
| label = "shc:cloud:bl"; |
| gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; |
| default-state = "off"; |
| }; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| reg = <0x80000000 0x20000000>; /* 512 MB */ |
| }; |
| |
| vmmcsd_fixed: fixedregulator0 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vmmcsd_fixed"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| }; |
| |
| &aes { |
| status = "okay"; |
| }; |
| |
| &davinci_mdio { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_default>; |
| pinctrl-1 = <&davinci_mdio_sleep>; |
| status = "okay"; |
| |
| ethernetphy0: ethernet-phy@0 { |
| reg = <0>; |
| smsc,disable-energy-detect; |
| }; |
| }; |
| |
| &epwmss1 { |
| status = "okay"; |
| |
| ehrpwm1: pwm@200 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ehrpwm1_pins>; |
| status = "okay"; |
| }; |
| }; |
| |
| &gpio1 { |
| hmtc-rst-hog { |
| gpio-hog; |
| gpios = <24 GPIO_ACTIVE_LOW>; |
| output-high; |
| line-name = "homematic_reset"; |
| }; |
| |
| hmtc-prog-hog { |
| gpio-hog; |
| gpios = <27 GPIO_ACTIVE_LOW>; |
| output-high; |
| line-name = "homematic_program"; |
| }; |
| }; |
| |
| &gpio3 { |
| zgb-rst-hog { |
| gpio-hog; |
| gpios = <18 GPIO_ACTIVE_LOW>; |
| output-low; |
| line-name = "zigbee_reset"; |
| }; |
| |
| zgb-boot-hog { |
| gpio-hog; |
| gpios = <19 GPIO_ACTIVE_HIGH>; |
| output-high; |
| line-name = "zigbee_boot"; |
| }; |
| }; |
| |
| &i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c0_pins>; |
| status = "okay"; |
| clock-frequency = <400000>; |
| |
| tps: tps@24 { |
| reg = <0x24>; |
| }; |
| |
| at24@50 { |
| compatible = "atmel,24c32"; |
| pagesize = <32>; |
| reg = <0x50>; |
| }; |
| |
| pcf8563@51 { |
| compatible = "nxp,pcf8563"; |
| reg = <0x51>; |
| }; |
| }; |
| |
| &mac { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_default>; |
| pinctrl-1 = <&cpsw_sleep>; |
| status = "okay"; |
| slaves = <1>; |
| cpsw_emac0: slave@200 { |
| phy-mode = "mii"; |
| phy-handle = <ðernetphy0>; |
| }; |
| }; |
| |
| &mmc1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins>; |
| bus-width = <0x4>; |
| cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; |
| cd-inverted; |
| max-frequency = <26000000>; |
| vmmc-supply = <&vmmcsd_fixed>; |
| status = "okay"; |
| }; |
| |
| &mmc2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&emmc_pins>; |
| bus-width = <8>; |
| max-frequency = <26000000>; |
| sd-uhs-sdr25; |
| vmmc-supply = <&vmmcsd_fixed>; |
| status = "okay"; |
| }; |
| |
| &mmc3 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc3_pins>; |
| bus-width = <4>; |
| cap-power-off-card; |
| max-frequency = <26000000>; |
| sd-uhs-sdr25; |
| vmmc-supply = <&vmmcsd_fixed>; |
| status = "okay"; |
| }; |
| |
| &rtc { |
| ti,no-init; |
| }; |
| |
| &sham { |
| status = "okay"; |
| }; |
| |
| &tps { |
| compatible = "ti,tps65217"; |
| ti,pmic-shutdown-controller; |
| |
| regulators { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| dcdc1_reg: regulator@0 { |
| reg = <0>; |
| regulator-name = "vdds_dpr"; |
| regulator-compatible = "dcdc1"; |
| regulator-min-microvolt = <1300000>; |
| regulator-max-microvolt = <1450000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| dcdc2_reg: regulator@1 { |
| reg = <1>; |
| /* |
| * VDD_MPU voltage limits 0.95V - 1.26V with |
| * +/-4% tolerance |
| */ |
| regulator-compatible = "dcdc2"; |
| regulator-name = "vdd_mpu"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1375000>; |
| regulator-boot-on; |
| regulator-always-on; |
| regulator-ramp-delay = <70000>; |
| }; |
| |
| dcdc3_reg: regulator@2 { |
| reg = <2>; |
| /* |
| * VDD_CORE voltage limits 0.95V - 1.1V with |
| * +/-4% tolerance |
| */ |
| regulator-name = "vdd_core"; |
| regulator-compatible = "dcdc3"; |
| regulator-min-microvolt = <925000>; |
| regulator-max-microvolt = <1125000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo1_reg: regulator@3 { |
| reg = <3>; |
| regulator-name = "vio,vrtc,vdds"; |
| regulator-compatible = "ldo1"; |
| regulator-min-microvolt = <1000000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: regulator@4 { |
| reg = <4>; |
| regulator-name = "vdd_3v3aux"; |
| regulator-compatible = "ldo2"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| |
| ldo3_reg: regulator@5 { |
| reg = <5>; |
| regulator-name = "vdd_1v8"; |
| regulator-compatible = "ldo3"; |
| regulator-min-microvolt = <900000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| }; |
| |
| ldo4_reg: regulator@6 { |
| reg = <6>; |
| regulator-name = "vdd_3v3a"; |
| regulator-compatible = "ldo4"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| &uart0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart0_pins>; |
| status = "okay"; |
| }; |
| |
| &uart1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart1_pins>; |
| status = "okay"; |
| }; |
| |
| &uart2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart2_pins>; |
| status = "okay"; |
| }; |
| |
| &uart4 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart4_pins>; |
| status = "okay"; |
| }; |
| |
| &usb1 { |
| dr_mode = "host"; |
| }; |
| |
| &am33xx_pinmux { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&clkout2_pin>; |
| |
| clkout2_pin: pinmux_clkout2_pin { |
| pinctrl-single,pins = < |
| /* xdma_event_intr1.clkout2 */ |
| AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT, MUX_MODE6) |
| >; |
| }; |
| |
| cpsw_default: cpsw_default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| >; |
| }; |
| |
| cpsw_sleep: cpsw_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| davinci_mdio_default: davinci_mdio_default { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) |
| >; |
| }; |
| |
| davinci_mdio_sleep: davinci_mdio_sleep { |
| pinctrl-single,pins = < |
| /* MDIO reset value */ |
| AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| >; |
| }; |
| |
| ehrpwm1_pins: pinmux_ehrpwm1 { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE6) /* gpmc_a3.gpio1_19 */ |
| >; |
| }; |
| |
| emmc_pins: pinmux_emmc_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) |
| >; |
| }; |
| |
| i2c0_pins: pinmux_i2c0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT, MUX_MODE0) |
| >; |
| }; |
| |
| mmc1_pins: pinmux_mmc1_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE5) |
| >; |
| }; |
| |
| mmc3_pins: pinmux_mmc3_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT, MUX_MODE3) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT, MUX_MODE3) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT, MUX_MODE3) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE3) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT, MUX_MODE3) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT, MUX_MODE3) |
| >; |
| }; |
| |
| uart0_pins: pinmux_uart0_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT, MUX_MODE0) |
| >; |
| }; |
| |
| uart1_pins: pinmux_uart1 { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0) |
| AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0) |
| >; |
| }; |
| |
| uart2_pins: pinmux_uart2_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) |
| AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) |
| >; |
| }; |
| |
| uart4_pins: pinmux_uart4_pins { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLUP, MUX_MODE6) |
| >; |
| }; |
| |
| user_leds_s0: user_leds_s0 { |
| pinctrl-single,pins = < |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLUP, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_OUTPUT_PULLUP, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_INPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_INPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_OUTPUT_PULLUP, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_FSR, PIN_OUTPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_AXR1, PIN_INPUT_PULLDOWN, MUX_MODE7) |
| AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE7) |
| >; |
| }; |
| }; |
