| // SPDX-License-Identifier: GPL-2.0-only |
| /* |
| * Copyright 2014 Freescale Semiconductor, Inc. |
| */ |
| |
| #include <linux/irqchip.h> |
| #include <linux/of_platform.h> |
| #include <linux/regmap.h> |
| #include <linux/mfd/syscon.h> |
| #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> |
| #include <asm/mach/arch.h> |
| |
| #include "common.h" |
| #include "cpuidle.h" |
| |
| static void __init imx6sx_enet_clk_sel(void) |
| { |
| struct regmap *gpr; |
| |
| gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr"); |
| if (!IS_ERR(gpr)) { |
| regmap_update_bits(gpr, IOMUXC_GPR1, |
| IMX6SX_GPR1_FEC_CLOCK_MUX_SEL_MASK, 0); |
| regmap_update_bits(gpr, IOMUXC_GPR1, |
| IMX6SX_GPR1_FEC_CLOCK_PAD_DIR_MASK, 0); |
| } else { |
| pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n"); |
| } |
| } |
| |
| static inline void imx6sx_enet_init(void) |
| { |
| imx6sx_enet_clk_sel(); |
| } |
| |
| static void __init imx6sx_init_machine(void) |
| { |
| of_platform_default_populate(NULL, NULL, NULL); |
| |
| imx6sx_enet_init(); |
| imx_anatop_init(); |
| imx6sx_pm_init(); |
| } |
| |
| static void __init imx6sx_init_irq(void) |
| { |
| imx_gpc_check_dt(); |
| imx_init_revision_from_anatop(); |
| imx_init_l2cache(); |
| imx_src_init(); |
| irqchip_init(); |
| imx6_pm_ccm_init("fsl,imx6sx-ccm"); |
| } |
| |
| static void __init imx6sx_init_late(void) |
| { |
| imx6sx_cpuidle_init(); |
| |
| if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) |
| platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); |
| } |
| |
| static const char * const imx6sx_dt_compat[] __initconst = { |
| "fsl,imx6sx", |
| NULL, |
| }; |
| |
| DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)") |
| .l2c_aux_val = 0, |
| .l2c_aux_mask = ~0, |
| .init_irq = imx6sx_init_irq, |
| .init_machine = imx6sx_init_machine, |
| .dt_compat = imx6sx_dt_compat, |
| .init_late = imx6sx_init_late, |
| MACHINE_END |