| // SPDX-License-Identifier: GPL-2.0 |
| |
| #include "dt-bindings/clock/bcm6362-clock.h" |
| #include "dt-bindings/reset/bcm6362-reset.h" |
| #include "dt-bindings/soc/bcm6362-pm.h" |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "brcm,bcm6362"; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| mips-hpt-frequency = <200000000>; |
| |
| cpu@0 { |
| compatible = "brcm,bmips4350"; |
| device_type = "cpu"; |
| reg = <0>; |
| }; |
| |
| cpu@1 { |
| compatible = "brcm,bmips4350"; |
| device_type = "cpu"; |
| reg = <1>; |
| }; |
| }; |
| |
| clocks { |
| periph_osc: periph-osc { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| clock-frequency = <50000000>; |
| clock-output-names = "periph"; |
| }; |
| |
| hsspi_osc: hsspi-osc { |
| compatible = "fixed-clock"; |
| |
| #clock-cells = <0>; |
| |
| clock-frequency = <400000000>; |
| clock-output-names = "hsspi_osc"; |
| }; |
| }; |
| |
| aliases { |
| nflash = &nflash; |
| serial0 = &uart0; |
| serial1 = &uart1; |
| spi0 = &lsspi; |
| spi1 = &hsspi; |
| }; |
| |
| cpu_intc: interrupt-controller { |
| #address-cells = <0>; |
| compatible = "mti,cpu-interrupt-controller"; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| }; |
| |
| ubus { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| compatible = "simple-bus"; |
| ranges; |
| |
| periph_clk: clock-controller@10000004 { |
| compatible = "brcm,bcm6362-clocks"; |
| reg = <0x10000004 0x4>; |
| #clock-cells = <1>; |
| }; |
| |
| pll_cntl: syscon@10000008 { |
| compatible = "syscon"; |
| reg = <0x10000008 0x4>; |
| native-endian; |
| |
| reboot { |
| compatible = "syscon-reboot"; |
| offset = <0x0>; |
| mask = <0x1>; |
| }; |
| }; |
| |
| periph_rst: reset-controller@10000010 { |
| compatible = "brcm,bcm6345-reset"; |
| reg = <0x10000010 0x4>; |
| #reset-cells = <1>; |
| }; |
| |
| periph_intc: interrupt-controller@10000020 { |
| compatible = "brcm,bcm6345-l1-intc"; |
| reg = <0x10000020 0x10>, |
| <0x10000030 0x10>; |
| |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| |
| interrupt-parent = <&cpu_intc>; |
| interrupts = <2>, <3>; |
| }; |
| |
| wdt: watchdog@1000005c { |
| compatible = "brcm,bcm7038-wdt"; |
| reg = <0x1000005c 0xc>; |
| |
| clocks = <&periph_osc>; |
| clock-names = "refclk"; |
| |
| timeout-sec = <30>; |
| }; |
| |
| uart0: serial@10000100 { |
| compatible = "brcm,bcm6345-uart"; |
| reg = <0x10000100 0x18>; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <3>; |
| |
| clocks = <&periph_osc>; |
| clock-names = "refclk"; |
| |
| status = "disabled"; |
| }; |
| |
| uart1: serial@10000120 { |
| compatible = "brcm,bcm6345-uart"; |
| reg = <0x10000120 0x18>; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <4>; |
| |
| clocks = <&periph_osc>; |
| clock-names = "refclk"; |
| |
| status = "disabled"; |
| }; |
| |
| nflash: nand@10000200 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,nand-bcm6368", |
| "brcm,brcmnand-v2.2", |
| "brcm,brcmnand"; |
| reg = <0x10000200 0x180>, |
| <0x10000600 0x200>, |
| <0x10000070 0x10>; |
| reg-names = "nand", |
| "nand-cache", |
| "nand-int-base"; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <12>; |
| |
| clocks = <&periph_clk BCM6362_CLK_NAND>; |
| clock-names = "nand"; |
| |
| status = "disabled"; |
| }; |
| |
| lsspi: spi@10000800 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,bcm6358-spi"; |
| reg = <0x10000800 0x70c>; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <2>; |
| |
| clocks = <&periph_clk BCM6362_CLK_SPI>; |
| clock-names = "spi"; |
| |
| resets = <&periph_rst BCM6362_RST_SPI>; |
| reset-names = "spi"; |
| |
| status = "disabled"; |
| }; |
| |
| hsspi: spi@10001000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,bcm6328-hsspi"; |
| reg = <0x10001000 0x600>; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <5>; |
| |
| clocks = <&periph_clk BCM6362_CLK_HSSPI>, |
| <&hsspi_osc>; |
| clock-names = "hsspi", |
| "pll"; |
| |
| resets = <&periph_rst BCM6362_RST_SPI>; |
| reset-names = "hsspi"; |
| |
| status = "disabled"; |
| }; |
| |
| periph_pwr: power-controller@10001848 { |
| compatible = "brcm,bcm6362-power-controller"; |
| reg = <0x10001848 0x4>; |
| #power-domain-cells = <1>; |
| }; |
| |
| leds0: led-controller@10001900 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "brcm,bcm6328-leds"; |
| reg = <0x10001900 0x24>; |
| |
| status = "disabled"; |
| }; |
| |
| ehci: usb@10002500 { |
| compatible = "brcm,bcm6362-ehci", "generic-ehci"; |
| reg = <0x10002500 0x100>; |
| big-endian; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <10>; |
| |
| phys = <&usbh 0>; |
| phy-names = "usb"; |
| |
| status = "disabled"; |
| }; |
| |
| ohci: usb@10002600 { |
| compatible = "brcm,bcm6362-ohci", "generic-ohci"; |
| reg = <0x10002600 0x100>; |
| big-endian; |
| no-big-frame-no; |
| |
| interrupt-parent = <&periph_intc>; |
| interrupts = <9>; |
| |
| phys = <&usbh 0>; |
| phy-names = "usb"; |
| |
| status = "disabled"; |
| }; |
| |
| usbh: usb-phy@10002700 { |
| compatible = "brcm,bcm6362-usbh-phy"; |
| reg = <0x10002700 0x38>; |
| |
| #phy-cells = <1>; |
| |
| clocks = <&periph_clk BCM6362_CLK_USBH>; |
| clock-names = "usbh"; |
| |
| power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>; |
| |
| resets = <&periph_rst BCM6362_RST_USBH>; |
| reset-names = "usbh"; |
| |
| status = "disabled"; |
| }; |
| }; |
| }; |