d10e025f0e4ba4b96d7b5786d232ac5b0b232b11 - linux

commit	d10e025f0e4ba4b96d7b5786d232ac5b0b232b11	[log] [tgz]
author	Atsushi Nemoto <anemo@mba.ocn.ne.jp>	Tue Aug 19 22:55:09 2008 +0900
committer	Ralf Baechle <ralf@linux-mips.org>	Sat Oct 11 16:18:42 2008 +0100
tree	a417a55071b4b7edc22b7c5bb1a2352e7b5986d9
parent	860e546c19d88c21819c7f0861c505debd2d6eed [diff]

MIPS: TXx9: Cache fixup

TX39/TX49 can enable/disable I/D cache at runtime.  Add kernel options
to control them.  This is useful to debug some cache-related issues,
such as aliasing or I/D coherency.  Also enable CWF bit for TX49 SoCs.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

arch/mips/txx9/generic/setup.c[diff]
arch/mips/txx9/generic/setup_tx3927.c[diff]
arch/mips/txx9/generic/setup_tx4927.c[diff]
arch/mips/txx9/generic/setup_tx4938.c[diff]
arch/mips/txx9/jmr3927/setup.c[diff]
arch/mips/txx9/rbtx4927/setup.c[diff]

6 files changed

tree: a417a55071b4b7edc22b7c5bb1a2352e7b5986d9