arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright Altera Corporation (C) 2015. All rights reserved.
 */

#include "socfpga_stratix10.dtsi"

/ {
	model = "SoCFPGA Stratix 10 SoCDK";
	compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";

	aliases {
		serial0 = &uart0;
		ethernet0 = &gmac0;
		ethernet1 = &gmac1;
		ethernet2 = &gmac2;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	leds {
		compatible = "gpio-leds";
		led-hps0 {
			label = "hps_led0";
			gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
		};

		led-hps1 {
			label = "hps_led1";
			gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
		};

		led-hps2 {
			label = "hps_led2";
			gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
		};
	};

	memory@80000000 {
		device_type = "memory";
		/* We expect the bootloader to fill in the reg */
		reg = <0 0x80000000 0 0>;
	};

	ref_033v: regulator-v-ref {
		compatible = "regulator-fixed";
		regulator-name = "0.33V";
		regulator-min-microvolt = <330000>;
		regulator-max-microvolt = <330000>;
	};

	soc {
		eccmgr {
			sdmmca-ecc@ff8c8c00 {
				compatible = "altr,socfpga-s10-sdmmc-ecc",
					     "altr,socfpga-sdmmc-ecc";
				reg = <0xff8c8c00 0x100>;
				altr,ecc-parent = <&mmc>;
				interrupts = <14 4>,
					     <15 4>;
			};
		};
	};
};

&gpio1 {
	status = "okay";
};

&gmac2 {
	status = "okay";
	phy-mode = "rgmii";
	phy-handle = <&phy0>;

	max-frame-size = <9000>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			reg = <4>;

			txd0-skew-ps = <0>; /* -420ps */
			txd1-skew-ps = <0>; /* -420ps */
			txd2-skew-ps = <0>; /* -420ps */
			txd3-skew-ps = <0>; /* -420ps */
			rxd0-skew-ps = <420>; /* 0ps */
			rxd1-skew-ps = <420>; /* 0ps */
			rxd2-skew-ps = <420>; /* 0ps */
			rxd3-skew-ps = <420>; /* 0ps */
			txen-skew-ps = <0>; /* -420ps */
			txc-skew-ps = <900>; /* 0ps */
			rxdv-skew-ps = <420>; /* 0ps */
			rxc-skew-ps = <1680>; /* 780ps */
		};
	};
};

&nand {
	status = "okay";

	flash@0 {
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		nand-bus-width = <16>;

		partition@0 {
			label = "u-boot";
			reg = <0 0x200000>;
		};

		partition@200000 {
			label = "root";
			reg = <0x200000 0x3fe00000>;
		};
	};
};

&osc1 {
	clock-frequency = <25000000>;
};

&uart0 {
	status = "okay";
};

&usb0 {
	status = "okay";
	disable-over-current;
};

&watchdog0 {
	status = "okay";
};

&i2c2 {
	status = "okay";
	clock-frequency = <100000>;
	i2c-sda-falling-time-ns = <890>;  /* hcnt */
	i2c-scl-falling-time-ns = <890>;  /* lcnt */

	adc@14 {
		compatible = "lltc,ltc2497";
		reg = <0x14>;
		vref-supply = <&ref_033v>;
	};

	temp@4c {
		compatible = "maxim,max1619";
		reg = <0x4c>;
	};

	eeprom@51 {
		compatible = "atmel,24c32";
		reg = <0x51>;
		pagesize = <32>;
	};

	rtc@68 {
		compatible = "dallas,ds1339";
		reg = <0x68>;
	};
};

&qspi {
	status = "okay";
	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,mt25qu02g", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <100000000>;

		m25p,fast-read;
		cdns,page-size = <256>;
		cdns,block-size = <16>;
		cdns,read-delay = <1>;
		cdns,tshsl-ns = <50>;
		cdns,tsd2d-ns = <50>;
		cdns,tchsh-ns = <4>;
		cdns,tslch-ns = <4>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			qspi_boot: partition@0 {
				label = "Boot and fpga data";
				reg = <0x0 0x03FE0000>;
			};

			qspi_rootfs: partition@3fe0000 {
				label = "Root Filesystem - JFFS2";
				reg = <0x03FE0000 0x0C020000>;
			};
		};
	};
};