| // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| /* |
| * Copyright (c) 2018 Collabora Ltd. |
| * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. |
| * |
| * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw |
| */ |
| |
| /dts-v1/; |
| #include "rk3399-rock960.dtsi" |
| |
| / { |
| model = "96boards RK3399 Ficus"; |
| compatible = "vamrs,ficus", "rockchip,rk3399"; |
| |
| chosen { |
| stdout-path = "serial2:1500000n8"; |
| }; |
| |
| clkin_gmac: external-gmac-clock { |
| compatible = "fixed-clock"; |
| clock-frequency = <125000000>; |
| clock-output-names = "clkin_gmac"; |
| #clock-cells = <0>; |
| }; |
| }; |
| |
| &gmac { |
| assigned-clocks = <&cru SCLK_RMII_SRC>; |
| assigned-clock-parents = <&clkin_gmac>; |
| clock_in_out = "input"; |
| phy-supply = <&vcc3v3_sys>; |
| phy-mode = "rgmii"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&rgmii_pins>; |
| snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; |
| snps,reset-active-low; |
| snps,reset-delays-us = <0 10000 50000>; |
| tx_delay = <0x28>; |
| rx_delay = <0x11>; |
| status = "okay"; |
| }; |
| |
| &pcie0 { |
| ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &pinctrl { |
| gmac { |
| rgmii_sleep_pins: rgmii-sleep-pins { |
| rockchip,pins = |
| <3 15 RK_FUNC_GPIO &pcfg_output_low>; |
| }; |
| }; |
| |
| pcie { |
| pcie_drv: pcie-drv { |
| rockchip,pins = |
| <1 24 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| |
| usb2 { |
| host_vbus_drv: host-vbus-drv { |
| rockchip,pins = |
| <4 27 RK_FUNC_GPIO &pcfg_pull_none>; |
| }; |
| }; |
| }; |
| |
| &usbdrd_dwc3_0 { |
| dr_mode = "host"; |
| }; |
| |
| &usbdrd_dwc3_1 { |
| dr_mode = "host"; |
| }; |
| |
| &vcc3v3_pcie { |
| gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| &vcc5v0_host { |
| gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>; |
| }; |