| [ | |
| { | |
| "ArchStdEvent": "MEM_ACCESS_RD" | |
| }, | |
| { | |
| "ArchStdEvent": "MEM_ACCESS_WR" | |
| }, | |
| { | |
| "ArchStdEvent": "UNALIGNED_LD_SPEC" | |
| }, | |
| { | |
| "ArchStdEvent": "UNALIGNED_ST_SPEC" | |
| }, | |
| { | |
| "ArchStdEvent": "UNALIGNED_LDST_SPEC" | |
| }, | |
| { | |
| "ArchStdEvent": "MEM_ACCESS" | |
| }, | |
| { | |
| "PublicDescription": "This event counts any correctable or uncorrectable memory error (ECC or parity) in the protected core RAMs", | |
| "ArchStdEvent": "MEMORY_ERROR" | |
| } | |
| ] |