| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Hisilicon HiP06 Low Pin Count device |
| |
| maintainers: |
| - Wei Xu <xuwei5@hisilicon.com> |
| |
| description: | |
| Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which |
| provides I/O access to some legacy ISA devices. |
| HiP06 is based on arm64 architecture where there is no I/O space. So, the |
| I/O ports here are not CPU addresses, and there is no 'ranges' property in |
| LPC device node. |
| |
| properties: |
| $nodename: |
| pattern: '^isa@[0-9a-f]+$' |
| description: | |
| The node name before '@' must be "isa" to represent the binding stick |
| to the ISA/EISA binding specification. |
| |
| compatible: |
| enum: |
| - hisilicon,hip06-lpc |
| - hisilicon,hip07-lpc |
| |
| reg: |
| maxItems: 1 |
| |
| '#address-cells': |
| const: 2 |
| |
| '#size-cells': |
| const: 1 |
| |
| required: |
| - compatible |
| - reg |
| |
| additionalProperties: |
| type: object |
| |
| examples: |
| - | |
| isa@a01b0000 { |
| compatible = "hisilicon,hip06-lpc"; |
| #address-cells = <2>; |
| #size-cells = <1>; |
| reg = <0xa01b0000 0x1000>; |
| |
| ipmi0: bt@e4 { |
| compatible = "ipmi-bt"; |
| device_type = "ipmi"; |
| reg = <0x01 0xe4 0x04>; |
| }; |
| }; |
| ... |
