arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts

// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2020-2021 Microchip Technology Inc */

/dts-v1/;

#include "microchip-mpfs.dtsi"

/* Clock frequency (in Hz) of the rtcclk */
#define RTCCLK_FREQ		1000000

/ {
	model = "Microchip PolarFire-SoC Icicle Kit";
	compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";

	aliases {
		ethernet0 = &mac1;
		serial0 = &mmuart0;
		serial1 = &mmuart1;
		serial2 = &mmuart2;
		serial3 = &mmuart3;
		serial4 = &mmuart4;
	};

	chosen {
		stdout-path = "serial1:115200n8";
	};

	cpus {
		timebase-frequency = <RTCCLK_FREQ>;
	};

	ddrc_cache_lo: memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x2e000000>;
		clocks = <&clkcfg CLK_DDRC>;
		status = "okay";
	};

	ddrc_cache_hi: memory@1000000000 {
		device_type = "memory";
		reg = <0x10 0x0 0x0 0x40000000>;
		clocks = <&clkcfg CLK_DDRC>;
		status = "okay";
	};
};

&refclk {
	clock-frequency = <600000000>;
};

&mmuart1 {
	status = "okay";
};

&mmuart2 {
	status = "okay";
};

&mmuart3 {
	status = "okay";
};

&mmuart4 {
	status = "okay";
};

&mmc {
	status = "okay";

	bus-width = <4>;
	disable-wp;
	cap-sd-highspeed;
	cap-mmc-highspeed;
	card-detect-delay = <200>;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	sd-uhs-sdr12;
	sd-uhs-sdr25;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
};

&spi0 {
	status = "okay";
};

&spi1 {
	status = "okay";
};

&qspi {
	status = "okay";
};

&i2c0 {
	status = "okay";
};

&i2c1 {
	status = "okay";
};

&i2c2 {
	status = "okay";
};

&mac0 {
	phy-mode = "sgmii";
	phy-handle = <&phy0>;
};

&mac1 {
	status = "okay";
	phy-mode = "sgmii";
	phy-handle = <&phy1>;
	phy1: ethernet-phy@9 {
		reg = <9>;
		ti,fifo-depth = <0x1>;
	};
	phy0: ethernet-phy@8 {
		reg = <8>;
		ti,fifo-depth = <0x1>;
	};
};

&gpio2 {
	interrupts = <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>,
		     <53>, <53>, <53>, <53>;
	status = "okay";
};

&rtc {
	status = "okay";
};

&usb {
	status = "okay";
	dr_mode = "host";
};

&mbox {
	status = "okay";
};

&syscontroller {
	status = "okay";
};

&pcie {
	status = "okay";
};

&core_pwm0 {
	status = "okay";
};