Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP Flex Serial Peripheral Interface (FSPI)

maintainers:
  - Han Xu <han.xu@nxp.com>
  - Kuldeep Singh <singh.kuldeep87k@gmail.com>

allOf:
  - $ref: "spi-controller.yaml#"

properties:
  compatible:
    enum:
      - nxp,imx8dxl-fspi
      - nxp,imx8mm-fspi
      - nxp,imx8mp-fspi
      - nxp,imx8qxp-fspi
      - nxp,lx2160a-fspi

  reg:
    items:
      - description: registers address space
      - description: memory mapped address space

  reg-names:
    items:
      - const: fspi_base
      - const: fspi_mmap

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: SPI bus clock
      - description: SPI serial clock

  clock-names:
    items:
      - const: fspi_en
      - const: fspi

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/fsl,qoriq-clockgen.h>

    soc {
        #address-cells = <2>;
        #size-cells = <2>;

        spi@20c0000 {
            compatible = "nxp,lx2160a-fspi";
            reg = <0x0 0x20c0000 0x0 0x100000>,
                  <0x0 0x20000000 0x0 0x10000000>;
            reg-names = "fspi_base", "fspi_mmap";
            interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>,
                     <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>;
            clock-names = "fspi_en", "fspi";
            #address-cells = <1>;
            #size-cells = <0>;

            flash@0 {
                compatible = "jedec,spi-nor";
                spi-max-frequency = <50000000>;
                reg = <0>;
                spi-rx-bus-width = <8>;
                spi-tx-bus-width = <8>;
            };
        };
    };