arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts

// SPDX-License-Identifier:     GPL-2.0
/*
 * Copyright (C) 2021, Intel Corporation
 */
#include "socfpga_agilex.dtsi"

/ {
	model = "eASIC N5X SoCDK";
	compatible = "intel,n5x-socdk", "intel,socfpga-agilex";

	aliases {
		serial0 = &uart0;
		ethernet0 = &gmac0;
		ethernet1 = &gmac1;
		ethernet2 = &gmac2;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@80000000 {
		device_type = "memory";
		/* We expect the bootloader to fill in the reg */
		reg = <0 0x80000000 0 0>;
	};

	soc {
		sdram_edac: memory-controller@f87f8000 {
			compatible = "snps,ddrc-3.80a";
			reg = <0xf87f8000 0x400>;
			interrupts = <0 175 4>;
			status = "okay";
		};
	};
};

&clkmgr {
	compatible = "intel,easic-n5x-clkmgr";
};

&gmac0 {
	status = "okay";
	phy-mode = "rgmii";
	phy-handle = <&phy0>;

	max-frame-size = <9000>;

	mdio0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";
		phy0: ethernet-phy@0 {
			reg = <4>;

			txd0-skew-ps = <0>; /* -420ps */
			txd1-skew-ps = <0>; /* -420ps */
			txd2-skew-ps = <0>; /* -420ps */
			txd3-skew-ps = <0>; /* -420ps */
			rxd0-skew-ps = <420>; /* 0ps */
			rxd1-skew-ps = <420>; /* 0ps */
			rxd2-skew-ps = <420>; /* 0ps */
			rxd3-skew-ps = <420>; /* 0ps */
			txen-skew-ps = <0>; /* -420ps */
			txc-skew-ps = <900>; /* 0ps */
			rxdv-skew-ps = <420>; /* 0ps */
			rxc-skew-ps = <1680>; /* 780ps */
		};
	};
};

&mmc {
	status = "okay";
	cap-sd-highspeed;
	broken-cd;
	bus-width = <4>;
	clk-phase-sd-hs = <0>, <135>;
};

&osc1 {
	clock-frequency = <25000000>;
};

&qspi {
	status = "okay";
	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "micron,mt25qu02g", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <100000000>;

		m25p,fast-read;
		cdns,page-size = <256>;
		cdns,block-size = <16>;
		cdns,read-delay = <2>;
		cdns,tshsl-ns = <50>;
		cdns,tsd2d-ns = <50>;
		cdns,tchsh-ns = <4>;
		cdns,tslch-ns = <4>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			qspi_boot: partition@0 {
				label = "Boot and fpga data";
				reg = <0x0 0x03FE0000>;
			};

			qspi_rootfs: partition@3fe0000 {
				label = "Root Filesystem - JFFS2";
				reg = <0x03FE0000 0x0C020000>;
			};
		};
	};
};

&uart0 {
	status = "okay";
};

&usb0 {
	status = "okay";
	disable-over-current;
};

&watchdog0 {
	status = "okay";
};