| MediaTek GCE |
| =============== |
| |
| The Global Command Engine (GCE) is used to help read/write registers with |
| critical time limitation, such as updating display configuration during the |
| vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. |
| |
| CMDQ driver uses mailbox framework for communication. Please refer to |
| mailbox.txt for generic information about mailbox device-tree bindings. |
| |
| Required properties: |
| - compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce" or |
| "mediatek,mt6779-gce". |
| - reg: Address range of the GCE unit |
| - interrupts: The interrupt signal from the GCE block |
| - clock: Clocks according to the common clock binding |
| - clock-names: Must be "gce" to stand for GCE clock |
| - #mbox-cells: Should be 2. |
| <&phandle channel priority> |
| phandle: Label name of a gce node. |
| channel: Channel of mailbox. Be equal to the thread id of GCE. |
| priority: Priority of GCE thread. |
| |
| Required properties for a client device: |
| - mboxes: Client use mailbox to communicate with GCE, it should have this |
| property and list of phandle, mailbox specifiers. |
| Optional properties for a client device: |
| - mediatek,gce-client-reg: Specify the sub-system id which is corresponding |
| to the register address, it should have this property and list of phandle, |
| sub-system specifiers. |
| <&phandle subsys_number start_offset size> |
| phandle: Label name of a gce node. |
| subsys_number: specify the sub-system id which is corresponding |
| to the register address. |
| start_offset: the start offset of register address that GCE can access. |
| size: the total size of register address that GCE can access. |
| |
| Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h', |
| 'dt-binding/gce/mt8183-gce.h' or 'dt-bindings/gce/mt6779-gce.h'. Such as |
| sub-system ids, thread priority, event ids. |
| |
| Example: |
| |
| gce: gce@10212000 { |
| compatible = "mediatek,mt8173-gce"; |
| reg = <0 0x10212000 0 0x1000>; |
| interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; |
| clocks = <&infracfg CLK_INFRA_GCE>; |
| clock-names = "gce"; |
| #mbox-cells = <3>; |
| }; |
| |
| Example for a client device: |
| |
| mmsys: clock-controller@14000000 { |
| compatible = "mediatek,mt8173-mmsys"; |
| mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST>, |
| <&gce 1 CMDQ_THR_PRIO_LOWEST>; |
| mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF |
| CMDQ_EVENT_MUTEX1_STREAM_EOF>; |
| mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>, |
| <&gce SUBSYS_1401XXXX 0x2000 0x100>; |
| ... |
| }; |