| // SPDX-License-Identifier: GPL-2.0 |
| /* |
| * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ |
| */ |
| |
| /dts-v1/; |
| |
| #include "k3-am654.dtsi" |
| #include <dt-bindings/input/input.h> |
| #include <dt-bindings/net/ti-dp83867.h> |
| |
| / { |
| compatible = "ti,am654-evm", "ti,am654"; |
| model = "Texas Instruments AM654 Base Board"; |
| |
| chosen { |
| stdout-path = "serial2:115200n8"; |
| bootargs = "earlycon=ns16550a,mmio32,0x02800000"; |
| }; |
| |
| memory@80000000 { |
| device_type = "memory"; |
| /* 4G RAM */ |
| reg = <0x00000000 0x80000000 0x00000000 0x80000000>, |
| <0x00000008 0x80000000 0x00000000 0x80000000>; |
| }; |
| |
| reserved-memory { |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| secure_ddr: secure-ddr@9e800000 { |
| reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */ |
| alignment = <0x1000>; |
| no-map; |
| }; |
| |
| mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 { |
| compatible = "shared-dma-pool"; |
| reg = <0 0xa0000000 0 0x100000>; |
| no-map; |
| }; |
| |
| mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 { |
| compatible = "shared-dma-pool"; |
| reg = <0 0xa0100000 0 0xf00000>; |
| no-map; |
| }; |
| |
| mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 { |
| compatible = "shared-dma-pool"; |
| reg = <0 0xa1000000 0 0x100000>; |
| no-map; |
| }; |
| |
| mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 { |
| compatible = "shared-dma-pool"; |
| reg = <0 0xa1100000 0 0xf00000>; |
| no-map; |
| }; |
| |
| rtos_ipc_memory_region: ipc-memories@a2000000 { |
| reg = <0x00 0xa2000000 0x00 0x00100000>; |
| alignment = <0x1000>; |
| no-map; |
| }; |
| }; |
| |
| gpio-keys { |
| compatible = "gpio-keys"; |
| autorepeat; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&push_button_pins_default>; |
| |
| sw5 { |
| label = "GPIO Key USER1"; |
| linux,code = <BTN_0>; |
| gpios = <&wkup_gpio0 24 GPIO_ACTIVE_LOW>; |
| }; |
| |
| sw6 { |
| label = "GPIO Key USER2"; |
| linux,code = <BTN_1>; |
| gpios = <&wkup_gpio0 27 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| evm_12v0: fixedregulator-evm12v0 { |
| /* main supply */ |
| compatible = "regulator-fixed"; |
| regulator-name = "evm_12v0"; |
| regulator-min-microvolt = <12000000>; |
| regulator-max-microvolt = <12000000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| vcc3v3_io: fixedregulator-vcc3v3io { |
| /* Output of TPS54334 */ |
| compatible = "regulator-fixed"; |
| regulator-name = "vcc3v3_io"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| regulator-boot-on; |
| vin-supply = <&evm_12v0>; |
| }; |
| |
| vdd_mmc1_sd: fixedregulator-sd { |
| compatible = "regulator-fixed"; |
| regulator-name = "vdd_mmc1_sd"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| enable-active-high; |
| vin-supply = <&vcc3v3_io>; |
| gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| &wkup_pmx0 { |
| wkup_i2c0_pins_default: wkup-i2c0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ |
| AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ |
| >; |
| }; |
| |
| push_button_pins_default: push-button-pins-default { |
| pinctrl-single,pins = < |
| AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */ |
| AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */ |
| >; |
| }; |
| |
| mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ |
| AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ |
| AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */ |
| AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */ |
| AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */ |
| AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */ |
| AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */ |
| AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */ |
| AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */ |
| AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */ |
| AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ |
| >; |
| }; |
| |
| wkup_pca554_default: wkup-pca554-default { |
| pinctrl-single,pins = < |
| AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ |
| >; |
| }; |
| |
| mcu_cpsw_pins_default: mcu-cpsw-pins-default { |
| pinctrl-single,pins = < |
| AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */ |
| AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */ |
| AM65X_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* (M2) MCU_RGMII1_TD3 */ |
| AM65X_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* (M3) MCU_RGMII1_TD2 */ |
| AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* (M4) MCU_RGMII1_TD1 */ |
| AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* (M5) MCU_RGMII1_TD0 */ |
| AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* (L2) MCU_RGMII1_RD3 */ |
| AM65X_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* (L5) MCU_RGMII1_RD2 */ |
| AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* (M6) MCU_RGMII1_RD1 */ |
| AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* (L6) MCU_RGMII1_RD0 */ |
| AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 0) /* (N1) MCU_RGMII1_TXC */ |
| AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */ |
| >; |
| }; |
| |
| mcu_mdio_pins_default: mcu-mdio1-pins-default { |
| pinctrl-single,pins = < |
| AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ |
| AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ |
| >; |
| }; |
| }; |
| |
| &main_pmx0 { |
| main_uart0_pins_default: main-uart0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ |
| AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ |
| AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */ |
| AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ |
| >; |
| }; |
| |
| main_i2c2_pins_default: main-i2c2-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ |
| AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ |
| >; |
| }; |
| |
| main_spi0_pins_default: main-spi0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ |
| AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ |
| AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ |
| AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ |
| >; |
| }; |
| |
| main_mmc0_pins_default: main-mmc0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ |
| AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ |
| AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ |
| AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ |
| AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ |
| AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ |
| AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ |
| AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ |
| AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ |
| AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */ |
| AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */ |
| AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ |
| >; |
| }; |
| |
| main_mmc1_pins_default: main-mmc1-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ |
| AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ |
| AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */ |
| AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */ |
| AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */ |
| AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */ |
| AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */ |
| AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ |
| >; |
| }; |
| |
| usb1_pins_default: usb1-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ |
| >; |
| }; |
| }; |
| |
| &main_pmx1 { |
| main_i2c0_pins_default: main-i2c0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ |
| AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ |
| >; |
| }; |
| |
| main_i2c1_pins_default: main-i2c1-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ |
| AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ |
| >; |
| }; |
| |
| ecap0_pins_default: ecap0-pins-default { |
| pinctrl-single,pins = < |
| AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ |
| >; |
| }; |
| }; |
| |
| &wkup_uart0 { |
| /* Wakeup UART is used by System firmware */ |
| status = "reserved"; |
| }; |
| |
| &main_uart0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_uart0_pins_default>; |
| power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; |
| }; |
| |
| &wkup_i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wkup_i2c0_pins_default>; |
| clock-frequency = <400000>; |
| |
| pca9554: gpio@39 { |
| compatible = "nxp,pca9554"; |
| reg = <0x39>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&wkup_pca554_default>; |
| interrupt-parent = <&wkup_gpio0>; |
| interrupts = <25 IRQ_TYPE_EDGE_FALLING>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| }; |
| }; |
| |
| &main_i2c0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c0_pins_default>; |
| clock-frequency = <400000>; |
| |
| pca9555: gpio@21 { |
| compatible = "nxp,pca9555"; |
| reg = <0x21>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| }; |
| |
| &main_i2c1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c1_pins_default>; |
| clock-frequency = <400000>; |
| }; |
| |
| &main_i2c2 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_i2c2_pins_default>; |
| clock-frequency = <400000>; |
| }; |
| |
| &ecap0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&ecap0_pins_default>; |
| }; |
| |
| &main_spi0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_spi0_pins_default>; |
| #address-cells = <1>; |
| #size-cells= <0>; |
| ti,pindir-d0-out-d1-in; |
| |
| flash@0{ |
| compatible = "jedec,spi-nor"; |
| reg = <0x0>; |
| spi-tx-bus-width = <1>; |
| spi-rx-bus-width = <1>; |
| spi-max-frequency = <48000000>; |
| #address-cells = <1>; |
| #size-cells= <1>; |
| }; |
| }; |
| |
| &sdhci0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_mmc0_pins_default>; |
| bus-width = <8>; |
| non-removable; |
| ti,driver-strength-ohm = <50>; |
| disable-wp; |
| }; |
| |
| /* |
| * Because of erratas i2025 and i2026 for silicon revision 1.0, the |
| * SD card interface might fail. Boards with sr1.0 are recommended to |
| * disable sdhci1 |
| */ |
| &sdhci1 { |
| vmmc-supply = <&vdd_mmc1_sd>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&main_mmc1_pins_default>; |
| ti,driver-strength-ohm = <50>; |
| disable-wp; |
| }; |
| |
| &usb1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&usb1_pins_default>; |
| dr_mode = "otg"; |
| }; |
| |
| &dwc3_0 { |
| status = "disabled"; |
| }; |
| |
| &usb0_phy { |
| status = "disabled"; |
| }; |
| |
| &tscadc0 { |
| adc { |
| ti,adc-channels = <0 1 2 3 4 5 6 7>; |
| }; |
| }; |
| |
| &tscadc1 { |
| adc { |
| ti,adc-channels = <0 1 2 3 4 5 6 7>; |
| }; |
| }; |
| |
| &serdes0 { |
| status = "disabled"; |
| }; |
| |
| &serdes1 { |
| status = "disabled"; |
| }; |
| |
| &pcie0_rc { |
| status = "disabled"; |
| }; |
| |
| &pcie0_ep { |
| status = "disabled"; |
| }; |
| |
| &pcie1_rc { |
| status = "disabled"; |
| }; |
| |
| &pcie1_ep { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster0 { |
| interrupts = <436>; |
| |
| mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 { |
| ti,mbox-tx = <1 0 0>; |
| ti,mbox-rx = <0 0 0>; |
| }; |
| }; |
| |
| &mailbox0_cluster1 { |
| interrupts = <432>; |
| |
| mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 { |
| ti,mbox-tx = <1 0 0>; |
| ti,mbox-rx = <0 0 0>; |
| }; |
| }; |
| |
| &mailbox0_cluster2 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster3 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster4 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster5 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster6 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster7 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster8 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster9 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster10 { |
| status = "disabled"; |
| }; |
| |
| &mailbox0_cluster11 { |
| status = "disabled"; |
| }; |
| |
| &mcu_r5fss0_core0 { |
| memory-region = <&mcu_r5fss0_core0_dma_memory_region>, |
| <&mcu_r5fss0_core0_memory_region>; |
| mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; |
| }; |
| |
| &mcu_r5fss0_core1 { |
| memory-region = <&mcu_r5fss0_core1_dma_memory_region>, |
| <&mcu_r5fss0_core1_memory_region>; |
| mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; |
| }; |
| |
| &ospi0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; |
| |
| flash@0{ |
| compatible = "jedec,spi-nor"; |
| reg = <0x0>; |
| spi-tx-bus-width = <8>; |
| spi-rx-bus-width = <8>; |
| spi-max-frequency = <25000000>; |
| cdns,tshsl-ns = <60>; |
| cdns,tsd2d-ns = <60>; |
| cdns,tchsh-ns = <60>; |
| cdns,tslch-ns = <60>; |
| cdns,read-delay = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| }; |
| }; |
| |
| &mcu_cpsw { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>; |
| }; |
| |
| &davinci_mdio { |
| phy0: ethernet-phy@0 { |
| reg = <0>; |
| ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; |
| ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; |
| }; |
| }; |
| |
| &cpsw_port1 { |
| phy-mode = "rgmii-rxid"; |
| phy-handle = <&phy0>; |
| }; |
| |
| &mcasp0 { |
| status = "disabled"; |
| }; |
| |
| &mcasp1 { |
| status = "disabled"; |
| }; |
| |
| &mcasp2 { |
| status = "disabled"; |
| }; |
| |
| &dss { |
| status = "disabled"; |
| }; |
| |
| &icssg0_mdio { |
| status = "disabled"; |
| }; |
| |
| &icssg1_mdio { |
| status = "disabled"; |
| }; |
| |
| &icssg2_mdio { |
| status = "disabled"; |
| }; |
