| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NXP i.MX8 DWMAC glue layer Device Tree Bindings |
| |
| maintainers: |
| - Joakim Zhang <qiangqing.zhang@nxp.com> |
| |
| # We need a select here so we don't match all nodes with 'snps,dwmac' |
| select: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - nxp,imx8mp-dwmac-eqos |
| - nxp,imx8dxl-dwmac-eqos |
| required: |
| - compatible |
| |
| allOf: |
| - $ref: "snps,dwmac.yaml#" |
| |
| properties: |
| compatible: |
| oneOf: |
| - items: |
| - enum: |
| - nxp,imx8mp-dwmac-eqos |
| - nxp,imx8dxl-dwmac-eqos |
| - const: snps,dwmac-5.10a |
| |
| clocks: |
| minItems: 3 |
| items: |
| - description: MAC host clock |
| - description: MAC apb clock |
| - description: MAC timer clock |
| - description: MAC RGMII TX clock |
| - description: EQOS MEM clock |
| |
| clock-names: |
| minItems: 3 |
| maxItems: 5 |
| contains: |
| enum: |
| - stmmaceth |
| - pclk |
| - ptp_ref |
| - tx |
| - mem |
| |
| intf_mode: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| items: |
| - items: |
| - description: phandle to the GPR syscon |
| - description: the offset of the GPR register |
| description: |
| Should be phandle/offset pair. The phandle to the syscon node which |
| encompases the GPR register, and the offset of the GPR register. |
| |
| snps,rmii_refclk_ext: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: |
| To select RMII reference clock from external. |
| |
| required: |
| - compatible |
| - clocks |
| - clock-names |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| #include <dt-bindings/clock/imx8mp-clock.h> |
| |
| eqos: ethernet@30bf0000 { |
| compatible = "nxp,imx8mp-dwmac-eqos","snps,dwmac-5.10a"; |
| reg = <0x30bf0000 0x10000>; |
| interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "macirq", "eth_wake_irq"; |
| clocks = <&clk IMX8MP_CLK_ENET_QOS_ROOT>, |
| <&clk IMX8MP_CLK_QOS_ENET_ROOT>, |
| <&clk IMX8MP_CLK_ENET_QOS_TIMER>, |
| <&clk IMX8MP_CLK_ENET_QOS>; |
| clock-names = "stmmaceth", "pclk", "ptp_ref", "tx"; |
| phy-mode = "rgmii"; |
| status = "disabled"; |
| }; |