| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Peripheral-specific properties for a SPI bus. |
| |
| description: |
| Many SPI controllers need to add properties to peripheral devices. They could |
| be common properties like spi-max-frequency, spi-cpha, etc. or they could be |
| controller specific like delay in clock or data lines, etc. These properties |
| need to be defined in the peripheral node because they are per-peripheral and |
| there can be multiple peripherals attached to a controller. All those |
| properties are listed here. The controller specific properties should go in |
| their own separate schema that should be referenced from here. |
| |
| maintainers: |
| - Pratyush Yadav <p.yadav@ti.com> |
| |
| properties: |
| reg: |
| minItems: 1 |
| maxItems: 256 |
| items: |
| items: |
| - minimum: 0 |
| maximum: 256 |
| description: |
| Chip select used by the device. |
| |
| spi-3wire: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: |
| The device requires 3-wire mode. |
| |
| spi-cs-high: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: |
| The device requires the chip select active high. |
| |
| spi-lsb-first: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: |
| The device requires the LSB first mode. |
| |
| spi-max-frequency: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| Maximum SPI clocking speed of the device in Hz. |
| |
| spi-rx-bus-width: |
| description: |
| Bus width to the SPI bus used for read transfers. |
| If 0 is provided, then no RX will be possible on this device. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [0, 1, 2, 4, 8] |
| default: 1 |
| |
| spi-rx-delay-us: |
| description: |
| Delay, in microseconds, after a read transfer. |
| |
| rx-sample-delay-ns: |
| description: SPI Rx sample delay offset, unit is nanoseconds. |
| The delay from the default sample time before the actual |
| sample of the rxd input signal occurs. |
| |
| spi-tx-bus-width: |
| description: |
| Bus width to the SPI bus used for write transfers. |
| If 0 is provided, then no TX will be possible on this device. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [0, 1, 2, 4, 8] |
| default: 1 |
| |
| spi-tx-delay-us: |
| description: |
| Delay, in microseconds, after a write transfer. |
| |
| stacked-memories: |
| description: Several SPI memories can be wired in stacked mode. |
| This basically means that either a device features several chip |
| selects, or that different devices must be seen as a single |
| bigger chip. This basically doubles (or more) the total address |
| space with only a single additional wire, while still needing |
| to repeat the commands when crossing a chip boundary. The size of |
| each chip should be provided as members of the array. |
| $ref: /schemas/types.yaml#/definitions/uint64-array |
| minItems: 2 |
| maxItems: 4 |
| |
| parallel-memories: |
| description: Several SPI memories can be wired in parallel mode. |
| The devices are physically on a different buses but will always |
| act synchronously as each data word is spread across the |
| different memories (eg. even bits are stored in one memory, odd |
| bits in the other). This basically doubles the address space and |
| the throughput while greatly complexifying the wiring because as |
| many busses as devices must be wired. The size of each chip should |
| be provided as members of the array. |
| $ref: /schemas/types.yaml#/definitions/uint64-array |
| minItems: 2 |
| maxItems: 4 |
| |
| # The controller specific properties go here. |
| allOf: |
| - $ref: cdns,qspi-nor-peripheral-props.yaml# |
| - $ref: samsung,spi-peripheral-props.yaml# |
| - $ref: nvidia,tegra210-quad-peripheral-props.yaml# |
| |
| additionalProperties: true |