blob: 3c095a5491fec83cbcc3217660561699c1722a37 [file] [log] [blame]
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-epp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra Encoder Pre-Processor
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
properties:
$nodename:
pattern: "^epp@[0-9a-f]+$"
compatible:
enum:
- nvidia,tegra20-epp
- nvidia,tegra30-epp
- nvidia,tegra114-epp
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
resets:
items:
- description: module reset
reset-names:
items:
- const: epp
iommus:
maxItems: 1
interconnects:
maxItems: 4
interconnect-names:
maxItems: 4
operating-points-v2: true
power-domains:
items:
- description: phandle to the core power domain
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/tegra20-car.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
epp@540c0000 {
compatible = "nvidia,tegra20-epp";
reg = <0x540c0000 0x00040000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_EPP>;
resets = <&tegra_car 19>;
reset-names = "epp";
};