arch/arm64/boot/dts/qcom/ipq5332-rdp442.dts

// SPDX-License-Identifier: BSD-3-Clause
/*
 * IPQ5332 RDP442 board device tree source
 *
 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

/dts-v1/;

#include "ipq5332-rdp-common.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.3";
	compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332";
};

&blsp1_i2c1 {
	clock-frequency = <400000>;
	pinctrl-0 = <&i2c_1_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&blsp1_spi0 {
	pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
	pinctrl-names = "default";
	status = "okay";

	flash@0 {
		compatible = "micron,n25q128a11", "jedec,spi-nor";
		reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
	};
};

&sdhc {
	bus-width = <4>;
	max-frequency = <192000000>;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	non-removable;
	pinctrl-0 = <&sdc_default_state>;
	pinctrl-names = "default";
	status = "okay";
};

&tlmm {
	i2c_1_pins: i2c-1-state {
		pins = "gpio29", "gpio30";
		function = "blsp1_i2c0";
		drive-strength = <8>;
		bias-pull-up;
	};

	sdc_default_state: sdc-default-state {
		clk-pins {
			pins = "gpio13";
			function = "sdc_clk";
			drive-strength = <8>;
			bias-disable;
		};

		cmd-pins {
			pins = "gpio12";
			function = "sdc_cmd";
			drive-strength = <8>;
			bias-pull-up;
		};

		data-pins {
			pins = "gpio8", "gpio9", "gpio10", "gpio11";
			function = "sdc_data";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	spi_0_data_clk_pins: spi-0-data-clk-state {
		pins = "gpio14", "gpio15", "gpio16";
		function = "blsp0_spi";
		drive-strength = <2>;
		bias-pull-down;
	};

	spi_0_cs_pins: spi-0-cs-state {
		pins = "gpio17";
		function = "blsp0_spi";
		drive-strength = <2>;
		bias-pull-up;
	};
};