| /* |
| * Copyright 2018 Advanced Micro Devices, Inc. |
| * |
| * Permission is hereby granted, free of charge, to any person obtaining a |
| * copy of this software and associated documentation files (the "Software"), |
| * to deal in the Software without restriction, including without limitation |
| * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| * and/or sell copies of the Software, and to permit persons to whom the |
| * Software is furnished to do so, subject to the following conditions: |
| * |
| * The above copyright notice and this permission notice shall be included in |
| * all copies or substantial portions of the Software. |
| * |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| * OTHER DEALINGS IN THE SOFTWARE. |
| * |
| */ |
| #ifndef __AMDGPU_GEM_H__ |
| #define __AMDGPU_GEM_H__ |
| |
| #include <drm/amdgpu_drm.h> |
| #include <drm/drm_gem.h> |
| |
| /* |
| * GEM. |
| */ |
| |
| #define AMDGPU_GEM_DOMAIN_MAX 0x3 |
| #define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, gem_base) |
| |
| void amdgpu_gem_object_free(struct drm_gem_object *obj); |
| int amdgpu_gem_object_open(struct drm_gem_object *obj, |
| struct drm_file *file_priv); |
| void amdgpu_gem_object_close(struct drm_gem_object *obj, |
| struct drm_file *file_priv); |
| unsigned long amdgpu_gem_timeout(uint64_t timeout_ns); |
| struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj); |
| struct drm_gem_object * |
| amdgpu_gem_prime_import_sg_table(struct drm_device *dev, |
| struct dma_buf_attachment *attach, |
| struct sg_table *sg); |
| struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev, |
| struct drm_gem_object *gobj, |
| int flags); |
| struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev, |
| struct dma_buf *dma_buf); |
| struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *); |
| void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj); |
| void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); |
| int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); |
| |
| extern const struct dma_buf_ops amdgpu_dmabuf_ops; |
| |
| /* |
| * GEM objects. |
| */ |
| void amdgpu_gem_force_release(struct amdgpu_device *adev); |
| int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size, |
| int alignment, u32 initial_domain, |
| u64 flags, enum ttm_bo_type type, |
| struct reservation_object *resv, |
| struct drm_gem_object **obj); |
| |
| int amdgpu_mode_dumb_create(struct drm_file *file_priv, |
| struct drm_device *dev, |
| struct drm_mode_create_dumb *args); |
| int amdgpu_mode_dumb_mmap(struct drm_file *filp, |
| struct drm_device *dev, |
| uint32_t handle, uint64_t *offset_p); |
| |
| int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| |
| int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data, |
| struct drm_file *filp); |
| |
| #endif |