| MediaTek High-Speed DMA Controller |
| ================================== |
| |
| This device follows the generic DMA bindings defined in dma/dma.txt. |
| |
| Required properties: |
| |
| - compatible: Must be one of |
| "mediatek,mt7622-hsdma": for MT7622 SoC |
| "mediatek,mt7623-hsdma": for MT7623 SoC |
| - reg: Should contain the register's base address and length. |
| - interrupts: Should contain a reference to the interrupt used by this |
| device. |
| - clocks: Should be the clock specifiers corresponding to the entry in |
| clock-names property. |
| - clock-names: Should contain "hsdma" entries. |
| - power-domains: Phandle to the power domain that the device is part of |
| - #dma-cells: The length of the DMA specifier, must be <1>. This one cell |
| in dmas property of a client device represents the channel |
| number. |
| Example: |
| |
| hsdma: dma-controller@1b007000 { |
| compatible = "mediatek,mt7623-hsdma"; |
| reg = <0 0x1b007000 0 0x1000>; |
| interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_LOW>; |
| clocks = <ðsys CLK_ETHSYS_HSDMA>; |
| clock-names = "hsdma"; |
| power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; |
| #dma-cells = <1>; |
| }; |
| |
| DMA clients must use the format described in dma/dma.txt file. |