blob: a3d69540d4e47338e4502bd9ee75539b02ae4945 [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge
*
* Copyright 2021 Google LLC.
*/
/ {
pp3300_brij_ps8640: pp3300-brij-ps8640 {
compatible = "regulator-fixed";
status = "okay";
regulator-name = "pp3300_brij_ps8640";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&en_pp3300_edp_brij_ps8640>;
vin-supply = <&pp3300_a>;
};
};
&dsi0_out {
remote-endpoint = <&ps8640_in>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
ps8640_bridge: bridge@8 {
compatible = "parade,ps8640";
reg = <0x8>;
powerdown-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
reset-gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&edp_brij_en>, <&edp_brij_ps8640_rst>;
vdd12-supply = <&pp1200_brij>;
vdd33-supply = <&pp3300_brij_ps8640>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ps8640_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
ps8640_out: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel: panel {
/* Compatible will be filled in per-board */
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&ps8640_out>;
};
};
};
};
};
};
&tlmm {
edp_brij_ps8640_rst: edp-brij-ps8640-rst {
pinmux {
pins = "gpio11";
function = "gpio";
};
pinconf {
pins = "gpio11";
drive-strength = <2>;
bias-disable;
};
};
en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640 {
pinmux {
pins = "gpio32";
function = "gpio";
};
pinconf {
pins = "gpio32";
drive-strength = <2>;
bias-disable;
};
};
};