| /* |
| * JBS Specific board startup routines. |
| * |
| * Copyright 2005, Embedded Alley Solutions, Inc |
| * |
| * This program is free software; you can redistribute it and/or modify it |
| * under the terms of the GNU General Public License as published by the |
| * Free Software Foundation; either version 2 of the License, or (at your |
| * option) any later version. |
| * |
| * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| * |
| * You should have received a copy of the GNU General Public License along |
| * with this program; if not, write to the Free Software Foundation, Inc., |
| * 675 Mass Ave, Cambridge, MA 02139, USA. |
| */ |
| #include <linux/init.h> |
| #include <linux/sched.h> |
| #include <linux/ioport.h> |
| #include <linux/mm.h> |
| #include <linux/console.h> |
| #include <linux/mc146818rtc.h> |
| #include <linux/delay.h> |
| |
| #include <asm/cpu.h> |
| #include <asm/bootinfo.h> |
| #include <asm/irq.h> |
| #include <asm/mipsregs.h> |
| #include <asm/reboot.h> |
| #include <asm/pgtable.h> |
| |
| #include <glb.h> |
| |
| /* CP0 hazard avoidance. */ |
| #define BARRIER __asm__ __volatile__(".set noreorder\n\t" \ |
| "nop; nop; nop; nop; nop; nop;\n\t" \ |
| ".set reorder\n\t") |
| |
| void __init board_setup(void) |
| { |
| unsigned long config0, configpr; |
| |
| config0 = read_c0_config(); |
| |
| /* clear all three cache coherency fields */ |
| config0 &= ~(0x7 | (7<<25) | (7<<28)); |
| config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) | |
| (CONF_CM_DEFAULT<<28)); |
| write_c0_config(config0); |
| BARRIER; |
| |
| configpr = read_c0_config7(); |
| configpr |= (1<<19); /* enable tlb */ |
| write_c0_config7(configpr); |
| BARRIER; |
| } |