| // SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) |
| /* |
| * Copyright 2020-2022 Advanced Micro Devices, Inc. |
| */ |
| |
| #include <dt-bindings/gpio/gpio.h> |
| #include "dt-bindings/interrupt-controller/arm-gic.h" |
| |
| / { |
| model = "Elba ASIC Board"; |
| compatible = "amd,pensando-elba"; |
| interrupt-parent = <&gic>; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| |
| dma-coherent; |
| |
| ahb_clk: oscillator0 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| }; |
| |
| emmc_clk: oscillator2 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| }; |
| |
| flash_clk: oscillator3 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| }; |
| |
| ref_clk: oscillator4 { |
| compatible = "fixed-clock"; |
| #clock-cells = <0>; |
| }; |
| |
| psci { |
| compatible = "arm,psci-0.2"; |
| method = "smc"; |
| }; |
| |
| timer { |
| compatible = "arm,armv8-timer"; |
| interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, |
| <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, |
| <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, |
| <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| |
| pmu { |
| compatible = "arm,cortex-a72-pmu"; |
| interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; |
| }; |
| |
| soc: soc { |
| compatible = "simple-bus"; |
| #address-cells = <2>; |
| #size-cells = <2>; |
| ranges; |
| |
| i2c0: i2c@400 { |
| compatible = "snps,designware-i2c"; |
| reg = <0x0 0x400 0x0 0x100>; |
| clocks = <&ahb_clk>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| i2c-sda-hold-time-ns = <480>; |
| interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| wdt0: watchdog@1400 { |
| compatible = "snps,dw-wdt"; |
| reg = <0x0 0x1400 0x0 0x100>; |
| clocks = <&ahb_clk>; |
| interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
| status = "disabled"; |
| }; |
| |
| qspi: spi@2400 { |
| compatible = "amd,pensando-elba-qspi", "cdns,qspi-nor"; |
| reg = <0x0 0x2400 0x0 0x400>, |
| <0x0 0x7fff0000 0x0 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&flash_clk>; |
| cdns,fifo-depth = <1024>; |
| cdns,fifo-width = <4>; |
| cdns,trigger-address = <0x7fff0000>; |
| status = "disabled"; |
| }; |
| |
| spi0: spi@2800 { |
| compatible = "amd,pensando-elba-spi"; |
| reg = <0x0 0x2800 0x0 0x100>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| amd,pensando-elba-syscon = <&syscon>; |
| clocks = <&ahb_clk>; |
| interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| num-cs = <2>; |
| status = "disabled"; |
| }; |
| |
| gpio0: gpio@4000 { |
| compatible = "snps,dw-apb-gpio"; |
| reg = <0x0 0x4000 0x0 0x78>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| |
| porta: gpio-port@0 { |
| compatible = "snps,dw-apb-gpio-port"; |
| reg = <0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| ngpios = <8>; |
| interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-controller; |
| interrupt-parent = <&gic>; |
| #interrupt-cells = <2>; |
| }; |
| |
| portb: gpio-port@1 { |
| compatible = "snps,dw-apb-gpio-port"; |
| reg = <1>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| ngpios = <8>; |
| }; |
| }; |
| |
| uart0: serial@4800 { |
| compatible = "ns16550a"; |
| reg = <0x0 0x4800 0x0 0x100>; |
| clocks = <&ref_clk>; |
| interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; |
| reg-shift = <2>; |
| reg-io-width = <4>; |
| }; |
| |
| gic: interrupt-controller@800000 { |
| compatible = "arm,gic-v3"; |
| reg = <0x0 0x800000 0x0 0x200000>, /* GICD */ |
| <0x0 0xa00000 0x0 0x200000>, /* GICR */ |
| <0x0 0x60000000 0x0 0x2000>, /* GICC */ |
| <0x0 0x60010000 0x0 0x1000>, /* GICH */ |
| <0x0 0x60020000 0x0 0x2000>; /* GICV */ |
| #address-cells = <2>; |
| #size-cells = <2>; |
| #interrupt-cells = <3>; |
| ranges; |
| interrupt-controller; |
| interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| |
| /* |
| * Elba specific pre-ITS is enabled using the |
| * existing property socionext,synquacer-pre-its |
| */ |
| gic_its: msi-controller@820000 { |
| compatible = "arm,gic-v3-its"; |
| reg = <0x0 0x820000 0x0 0x10000>; |
| msi-controller; |
| #msi-cells = <1>; |
| socionext,synquacer-pre-its = |
| <0xc00000 0x1000000>; |
| }; |
| }; |
| |
| emmc: mmc@30440000 { |
| compatible = "amd,pensando-elba-sd4hc", "cdns,sd4hc"; |
| reg = <0x0 0x30440000 0x0 0x10000>, |
| <0x0 0x30480044 0x0 0x4>; /* byte-lane ctrl */ |
| clocks = <&emmc_clk>; |
| interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| cdns,phy-input-delay-sd-highspeed = <0x4>; |
| cdns,phy-input-delay-legacy = <0x4>; |
| cdns,phy-input-delay-sd-uhs-sdr50 = <0x6>; |
| cdns,phy-input-delay-sd-uhs-ddr50 = <0x16>; |
| mmc-ddr-1_8v; |
| status = "disabled"; |
| }; |
| |
| syscon: syscon@307c0000 { |
| compatible = "amd,pensando-elba-syscon", "syscon"; |
| reg = <0x0 0x307c0000 0x0 0x3000>; |
| }; |
| }; |
| }; |