| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/usb/starfive,jh7110-usb.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: StarFive JH7110 wrapper module for the Cadence USBSS-DRD controller |
| |
| maintainers: |
| - Minda Chen <minda.chen@starfivetech.com> |
| |
| properties: |
| compatible: |
| const: starfive,jh7110-usb |
| |
| ranges: true |
| |
| starfive,stg-syscon: |
| $ref: /schemas/types.yaml#/definitions/phandle-array |
| items: |
| - items: |
| - description: phandle to System Register Controller stg_syscon node. |
| - description: dr mode register offset of STG_SYSCONSAIF__SYSCFG register for USB. |
| description: |
| The phandle to System Register Controller syscon node and the offset |
| of STG_SYSCONSAIF__SYSCFG register for USB. |
| |
| dr_mode: |
| enum: [host, otg, peripheral] |
| |
| "#address-cells": |
| enum: [1, 2] |
| |
| "#size-cells": |
| enum: [1, 2] |
| |
| clocks: |
| items: |
| - description: link power management clock |
| - description: standby clock |
| - description: APB clock |
| - description: AXI clock |
| - description: UTMI APB clock |
| |
| clock-names: |
| items: |
| - const: lpm |
| - const: stb |
| - const: apb |
| - const: axi |
| - const: utmi_apb |
| |
| resets: |
| items: |
| - description: Power up reset |
| - description: APB clock reset |
| - description: AXI clock reset |
| - description: UTMI APB clock reset |
| |
| reset-names: |
| items: |
| - const: pwrup |
| - const: apb |
| - const: axi |
| - const: utmi_apb |
| |
| patternProperties: |
| "^usb@[0-9a-f]+$": |
| $ref: cdns,usb3.yaml# |
| description: Required child node |
| |
| required: |
| - compatible |
| - ranges |
| - starfive,stg-syscon |
| - '#address-cells' |
| - '#size-cells' |
| - dr_mode |
| - clocks |
| - resets |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| usb@10100000 { |
| compatible = "starfive,jh7110-usb"; |
| ranges = <0x0 0x10100000 0x100000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| starfive,stg-syscon = <&stg_syscon 0x4>; |
| clocks = <&syscrg 4>, |
| <&stgcrg 5>, |
| <&stgcrg 1>, |
| <&stgcrg 3>, |
| <&stgcrg 2>; |
| clock-names = "lpm", "stb", "apb", "axi", "utmi_apb"; |
| resets = <&stgcrg 10>, |
| <&stgcrg 8>, |
| <&stgcrg 7>, |
| <&stgcrg 9>; |
| reset-names = "pwrup", "apb", "axi", "utmi_apb"; |
| dr_mode = "host"; |
| |
| usb@0 { |
| compatible = "cdns,usb3"; |
| reg = <0x0 0x10000>, |
| <0x10000 0x10000>, |
| <0x20000 0x10000>; |
| reg-names = "otg", "xhci", "dev"; |
| interrupts = <100>, <108>, <110>; |
| interrupt-names = "host", "peripheral", "otg"; |
| maximum-speed = "super-speed"; |
| }; |
| }; |