| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Loongson-1 Interrupt Controller |
| |
| maintainers: |
| - Keguang Zhang <keguang.zhang@gmail.com> |
| |
| description: |
| Loongson-1 interrupt controller is connected to the MIPS core interrupt |
| controller, which controls several groups of interrupts. |
| |
| properties: |
| compatible: |
| const: loongson,ls1x-intc |
| |
| reg: |
| maxItems: 1 |
| |
| interrupt-controller: true |
| |
| '#interrupt-cells': |
| const: 2 |
| |
| interrupts: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - interrupt-controller |
| - '#interrupt-cells' |
| - interrupts |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| intc0: interrupt-controller@1fd01040 { |
| compatible = "loongson,ls1x-intc"; |
| reg = <0x1fd01040 0x18>; |
| |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| interrupt-parent = <&cpu_intc>; |
| interrupts = <2>; |
| }; |