| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ |
| /* |
| * Copyright (c) 2021 Sergio Paracuellos |
| * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com> |
| */ |
| |
| #ifndef DT_BINDING_MT7621_RESET_H |
| #define DT_BINDING_MT7621_RESET_H |
| |
| #define MT7621_RST_SYS 0 |
| #define MT7621_RST_MCM 2 |
| #define MT7621_RST_HSDMA 5 |
| #define MT7621_RST_FE 6 |
| #define MT7621_RST_SPDIFTX 7 |
| #define MT7621_RST_TIMER 8 |
| #define MT7621_RST_INT 9 |
| #define MT7621_RST_MC 10 |
| #define MT7621_RST_PCM 11 |
| #define MT7621_RST_PIO 13 |
| #define MT7621_RST_GDMA 14 |
| #define MT7621_RST_NFI 15 |
| #define MT7621_RST_I2C 16 |
| #define MT7621_RST_I2S 17 |
| #define MT7621_RST_SPI 18 |
| #define MT7621_RST_UART1 19 |
| #define MT7621_RST_UART2 20 |
| #define MT7621_RST_UART3 21 |
| #define MT7621_RST_ETH 23 |
| #define MT7621_RST_PCIE0 24 |
| #define MT7621_RST_PCIE1 25 |
| #define MT7621_RST_PCIE2 26 |
| #define MT7621_RST_AUX_STCK 28 |
| #define MT7621_RST_CRYPTO 29 |
| #define MT7621_RST_SDXC 30 |
| #define MT7621_RST_PPE 31 |
| |
| #endif /* DT_BINDING_MT7621_RESET_H */ |
