| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm SM8250 Display DPU |
| |
| maintainers: |
| - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
| |
| $ref: /schemas/display/msm/dpu-common.yaml# |
| |
| properties: |
| compatible: |
| const: qcom,sm8250-dpu |
| |
| reg: |
| items: |
| - description: Address offset and size for mdp register set |
| - description: Address offset and size for vbif register set |
| |
| reg-names: |
| items: |
| - const: mdp |
| - const: vbif |
| |
| clocks: |
| items: |
| - description: Display ahb clock |
| - description: Display hf axi clock |
| - description: Display core clock |
| - description: Display vsync clock |
| |
| clock-names: |
| items: |
| - const: iface |
| - const: bus |
| - const: core |
| - const: vsync |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - clocks |
| - clock-names |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/qcom,dispcc-sm8250.h> |
| #include <dt-bindings/clock/qcom,gcc-sm8250.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interconnect/qcom,sm8250.h> |
| #include <dt-bindings/power/qcom,rpmhpd.h> |
| |
| display-controller@ae01000 { |
| compatible = "qcom,sm8250-dpu"; |
| reg = <0x0ae01000 0x8f000>, |
| <0x0aeb0000 0x2008>; |
| reg-names = "mdp", "vbif"; |
| |
| clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, |
| <&gcc GCC_DISP_HF_AXI_CLK>, |
| <&dispcc DISP_CC_MDSS_MDP_CLK>, |
| <&dispcc DISP_CC_MDSS_VSYNC_CLK>; |
| clock-names = "iface", "bus", "core", "vsync"; |
| |
| assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; |
| assigned-clock-rates = <19200000>; |
| |
| operating-points-v2 = <&mdp_opp_table>; |
| power-domains = <&rpmhpd RPMHPD_MMCX>; |
| |
| interrupt-parent = <&mdss>; |
| interrupts = <0>; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| endpoint { |
| remote-endpoint = <&dsi0_in>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| endpoint { |
| remote-endpoint = <&dsi1_in>; |
| }; |
| }; |
| }; |
| }; |
| ... |