Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. MSM8226 TLMM block

maintainers:
  - Bjorn Andersson <bjorn.andersson@linaro.org>

description:
  Top Level Mode Multiplexer pin controller in Qualcomm MSM8226 SoC.

properties:
  compatible:
    const: qcom,msm8226-pinctrl

  reg:
    description: Specifies the base address and size of the TLMM register space
    maxItems: 1

  interrupts:
    maxItems: 1

  gpio-reserved-ranges:
    maxItems: 1

patternProperties:
  "-state$":
    oneOf:
      - $ref: "#/$defs/qcom-msm8226-tlmm-state"
      - patternProperties:
          "-pins$":
            $ref: "#/$defs/qcom-msm8226-tlmm-state"
        additionalProperties: false

$defs:
  qcom-msm8226-tlmm-state:
    type: object
    description:
      Pinctrl node's client devices use subnodes for desired pin configuration.
      Client device subnodes use below standard properties.
    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
    unevaluatedProperties: false

    properties:
      pins:
        description:
          List of gpio pins affected by the properties specified in this
          subnode.
        items:
          oneOf:
            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"
            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
        minItems: 1
        maxItems: 36

      function:
        description:
          Specify the alternative function to be configured for the specified
          pins. Functions are only valid for gpio pins.
        enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6,
                blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
                blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1,
                gp0_clk, gp1_clk, sdc3, wlan ]

    required:
      - pins

allOf:
  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#

required:
  - compatible
  - reg

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    msmgpio: pinctrl@fd510000 {
        compatible = "qcom,msm8226-pinctrl";
        reg = <0xfd510000 0x4000>;

        gpio-controller;
        #gpio-cells = <2>;
        gpio-ranges = <&msmgpio 0 0 117>;
        interrupt-controller;
        #interrupt-cells = <2>;
        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;

        serial-state {
            pins = "gpio8", "gpio9";
            function = "blsp_uart3";
            drive-strength = <8>;
            bias-disable;
        };
    };