| /* |
| * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| /dts-v1/; |
| |
| /include/ "skeleton.dtsi" |
| |
| / { |
| compatible = "snps,nsimosci_hs"; |
| clock-frequency = <5000000>; /* 5 MHZ */ |
| #address-cells = <1>; |
| #size-cells = <1>; |
| interrupt-parent = <&core_intc>; |
| |
| chosen { |
| /* this is for console on serial */ |
| bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug"; |
| }; |
| |
| aliases { |
| serial0 = &uart0; |
| }; |
| |
| fpga { |
| compatible = "simple-bus"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| /* child and parent address space 1:1 mapped */ |
| ranges; |
| |
| core_intc: core-interrupt-controller { |
| compatible = "snps,archs-intc"; |
| interrupt-controller; |
| #interrupt-cells = <1>; |
| /* interrupts = <16 17 18 19 20 21 22 23 24 25>; */ |
| }; |
| |
| idu_intc: idu-interrupt-controller { |
| compatible = "snps,archs-idu-intc"; |
| interrupt-controller; |
| interrupt-parent = <&core_intc>; |
| |
| /* |
| * <hwirq distribution> |
| * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 |
| */ |
| #interrupt-cells = <2>; |
| |
| /* |
| * upstream irqs to core intc - downstream these are |
| * "COMMON" irq 0,1.. |
| */ |
| interrupts = <24 25 26 27 28 29 30 31>; |
| }; |
| |
| uart0: serial@f0000000 { |
| compatible = "ns8250"; |
| reg = <0xf0000000 0x2000>; |
| interrupt-parent = <&idu_intc>; |
| interrupts = <0 0>; /* cmn irq 0 -> cpu irq 24 |
| RR distribute to all cpus */ |
| clock-frequency = <3686400>; |
| baud = <115200>; |
| reg-shift = <2>; |
| reg-io-width = <4>; |
| no-loopback-test = <1>; |
| }; |
| |
| pgu0: pgu@f9000000 { |
| compatible = "snps,arcpgufb"; |
| reg = <0xf9000000 0x400>; |
| }; |
| |
| ps2: ps2@f9001000 { |
| compatible = "snps,arc_ps2"; |
| reg = <0xf9000400 0x14>; |
| interrupts = <3 0>; |
| interrupt-parent = <&idu_intc>; |
| interrupt-names = "arc_ps2_irq"; |
| }; |
| |
| eth0: ethernet@f0003000 { |
| compatible = "snps,oscilan"; |
| reg = <0xf0003000 0x44>; |
| interrupt-parent = <&idu_intc>; |
| interrupts = <1 2>, <2 2>; |
| interrupt-names = "rx", "tx"; |
| }; |
| |
| arcpct0: pct { |
| compatible = "snps,archs-pct"; |
| #interrupt-cells = <1>; |
| interrupts = <20>; |
| }; |
| }; |
| }; |