| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Intel IXP4xx PCI controller |
| |
| maintainers: |
| - Linus Walleij <linus.walleij@linaro.org> |
| |
| description: PCI host controller found in the Intel IXP4xx SoC series. |
| |
| allOf: |
| - $ref: /schemas/pci/pci-host-bridge.yaml# |
| |
| properties: |
| compatible: |
| items: |
| - enum: |
| - intel,ixp42x-pci |
| - intel,ixp43x-pci |
| description: The two supported variants are ixp42x and ixp43x, |
| though more variants may exist. |
| |
| reg: |
| items: |
| - description: IXP4xx-specific registers |
| |
| interrupts: |
| items: |
| - description: Main PCI interrupt |
| - description: PCI DMA interrupt 1 |
| - description: PCI DMA interrupt 2 |
| |
| ranges: |
| maxItems: 2 |
| description: Typically one memory range of 64MB and one IO |
| space range of 64KB. |
| |
| dma-ranges: |
| maxItems: 1 |
| description: The DMA range tells the PCI host which addresses |
| the RAM is at. It can map only 64MB so if the RAM is bigger |
| than 64MB the DMA access has to be restricted to these |
| addresses. |
| |
| "#interrupt-cells": true |
| |
| interrupt-map: true |
| |
| interrupt-map-mask: |
| items: |
| - const: 0xf800 |
| - const: 0 |
| - const: 0 |
| - const: 7 |
| |
| required: |
| - compatible |
| - reg |
| - dma-ranges |
| - "#interrupt-cells" |
| - interrupt-map |
| - interrupt-map-mask |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| pci@c0000000 { |
| compatible = "intel,ixp43x-pci"; |
| reg = <0xc0000000 0x1000>; |
| #address-cells = <3>; |
| #size-cells = <2>; |
| device_type = "pci"; |
| bus-range = <0x00 0xff>; |
| |
| ranges = |
| <0x02000000 0 0x48000000 0x48000000 0 0x04000000>, |
| <0x01000000 0 0x00000000 0x4c000000 0 0x00010000>; |
| dma-ranges = |
| <0x02000000 0 0x00000000 0x00000000 0 0x04000000>; |
| |
| #interrupt-cells = <1>; |
| interrupt-map-mask = <0xf800 0 0 7>; |
| interrupt-map = |
| <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */ |
| <0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */ |
| <0x0800 0 0 3 &gpio0 9 3>, /* INT C on slot 1 is irq 9 */ |
| <0x0800 0 0 4 &gpio0 8 3>, /* INT D on slot 1 is irq 8 */ |
| <0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */ |
| <0x1000 0 0 2 &gpio0 9 3>, /* INT B on slot 2 is irq 9 */ |
| <0x1000 0 0 3 &gpio0 8 3>, /* INT C on slot 2 is irq 8 */ |
| <0x1000 0 0 4 &gpio0 11 3>, /* INT D on slot 2 is irq 11 */ |
| <0x1800 0 0 1 &gpio0 9 3>, /* INT A on slot 3 is irq 9 */ |
| <0x1800 0 0 2 &gpio0 8 3>, /* INT B on slot 3 is irq 8 */ |
| <0x1800 0 0 3 &gpio0 11 3>, /* INT C on slot 3 is irq 11 */ |
| <0x1800 0 0 4 &gpio0 10 3>; /* INT D on slot 3 is irq 10 */ |
| }; |
