| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: StarFive SoC TRNG Module |
| |
| maintainers: |
| - Jia Jie Ho <jiajie.ho@starfivetech.com> |
| |
| properties: |
| compatible: |
| oneOf: |
| - items: |
| - const: starfive,jh8100-trng |
| - const: starfive,jh7110-trng |
| - const: starfive,jh7110-trng |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| items: |
| - description: Hardware reference clock |
| - description: AHB reference clock |
| |
| clock-names: |
| items: |
| - const: hclk |
| - const: ahb |
| |
| resets: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| - resets |
| - interrupts |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| rng: rng@1600C000 { |
| compatible = "starfive,jh7110-trng"; |
| reg = <0x1600C000 0x4000>; |
| clocks = <&clk 15>, <&clk 16>; |
| clock-names = "hclk", "ahb"; |
| resets = <&reset 3>; |
| interrupts = <30>; |
| }; |
| ... |