| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: High-Level Data Link Control(HDLC) |
| |
| description: HDLC part in Universal communication controllers (UCCs) |
| |
| maintainers: |
| - Frank Li <Frank.Li@nxp.com> |
| |
| properties: |
| compatible: |
| const: fsl,ucc-hdlc |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| cell-index: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| |
| rx-clock-name: |
| $ref: /schemas/types.yaml#/definitions/string |
| oneOf: |
| - pattern: "^brg([0-9]|1[0-6])$" |
| - pattern: "^clk([0-9]|1[0-9]|2[0-4])$" |
| |
| tx-clock-name: |
| $ref: /schemas/types.yaml#/definitions/string |
| oneOf: |
| - pattern: "^brg([0-9]|1[0-6])$" |
| - pattern: "^clk([0-9]|1[0-9]|2[0-4])$" |
| |
| fsl,tdm-interface: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: Specify that hdlc is based on tdm-interface |
| |
| fsl,rx-sync-clock: |
| $ref: /schemas/types.yaml#/definitions/string |
| description: rx-sync |
| enum: |
| - none |
| - rsync_pin |
| - brg9 |
| - brg10 |
| - brg11 |
| - brg13 |
| - brg14 |
| - brg15 |
| |
| fsl,tx-sync-clock: |
| $ref: /schemas/types.yaml#/definitions/string |
| description: tx-sync |
| enum: |
| - none |
| - tsync_pin |
| - brg9 |
| - brg10 |
| - brg11 |
| - brg13 |
| - brg14 |
| - brg15 |
| |
| fsl,tdm-framer-type: |
| $ref: /schemas/types.yaml#/definitions/string |
| description: required for tdm interface |
| enum: [e1, t1] |
| |
| fsl,tdm-id: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: number of TDM ID |
| |
| fsl,tx-timeslot-mask: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| required for tdm interface. |
| time slot mask for TDM operation. Indicates which time |
| slots used for transmitting and receiving. |
| |
| fsl,rx-timeslot-mask: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| required for tdm interface. |
| time slot mask for TDM operation. Indicates which time |
| slots used for transmitting and receiving. |
| |
| fsl,siram-entry-id: |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| description: |
| required for tdm interface |
| Must be 0,2,4...64. the number of TDM entry. |
| |
| fsl,tdm-internal-loopback: |
| $ref: /schemas/types.yaml#/definitions/flag |
| description: |
| optional for tdm interface |
| Internal loopback connecting on TDM layer. |
| |
| fsl,hmask: |
| $ref: /schemas/types.yaml#/definitions/uint16 |
| description: | |
| HDLC address recognition. Set to zero to disable |
| address filtering of packets: |
| fsl,hmask = /bits/ 16 <0x0000>; |
| |
| required: |
| - compatible |
| - reg |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| communication@2000 { |
| compatible = "fsl,ucc-hdlc"; |
| reg = <0x2000 0x200>; |
| rx-clock-name = "clk8"; |
| tx-clock-name = "clk9"; |
| fsl,rx-sync-clock = "rsync_pin"; |
| fsl,tx-sync-clock = "tsync_pin"; |
| fsl,tx-timeslot-mask = <0xfffffffe>; |
| fsl,rx-timeslot-mask = <0xfffffffe>; |
| fsl,tdm-framer-type = "e1"; |
| fsl,tdm-id = <0>; |
| fsl,siram-entry-id = <0>; |
| fsl,tdm-interface; |
| }; |
| |
| - | |
| communication@2000 { |
| compatible = "fsl,ucc-hdlc"; |
| reg = <0x2000 0x200>; |
| rx-clock-name = "brg1"; |
| tx-clock-name = "brg1"; |
| }; |