| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/timer/renesas,tmu.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Renesas R-Mobile/R-Car Timer Unit (TMU) |
| |
| maintainers: |
| - Geert Uytterhoeven <geert+renesas@glider.be> |
| - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> |
| |
| description: |
| The TMU is a 32-bit timer/counter with configurable clock inputs and |
| programmable compare match. |
| |
| Channels share hardware resources but their counter and compare match value |
| are independent. The TMU hardware supports up to three channels. |
| |
| properties: |
| compatible: |
| items: |
| - enum: |
| - renesas,tmu-r8a73a4 # R-Mobile APE6 |
| - renesas,tmu-r8a7740 # R-Mobile A1 |
| - renesas,tmu-r8a7742 # RZ/G1H |
| - renesas,tmu-r8a7743 # RZ/G1M |
| - renesas,tmu-r8a7744 # RZ/G1N |
| - renesas,tmu-r8a7745 # RZ/G1E |
| - renesas,tmu-r8a77470 # RZ/G1C |
| - renesas,tmu-r8a774a1 # RZ/G2M |
| - renesas,tmu-r8a774b1 # RZ/G2N |
| - renesas,tmu-r8a774c0 # RZ/G2E |
| - renesas,tmu-r8a774e1 # RZ/G2H |
| - renesas,tmu-r8a7778 # R-Car M1A |
| - renesas,tmu-r8a7779 # R-Car H1 |
| - renesas,tmu-r8a7790 # R-Car H2 |
| - renesas,tmu-r8a7791 # R-Car M2-W |
| - renesas,tmu-r8a7792 # R-Car V2H |
| - renesas,tmu-r8a7793 # R-Car M2-N |
| - renesas,tmu-r8a7794 # R-Car E2 |
| - renesas,tmu-r8a7795 # R-Car H3 |
| - renesas,tmu-r8a7796 # R-Car M3-W |
| - renesas,tmu-r8a77961 # R-Car M3-W+ |
| - renesas,tmu-r8a77965 # R-Car M3-N |
| - renesas,tmu-r8a77970 # R-Car V3M |
| - renesas,tmu-r8a77980 # R-Car V3H |
| - renesas,tmu-r8a77990 # R-Car E3 |
| - renesas,tmu-r8a77995 # R-Car D3 |
| - renesas,tmu-r8a779a0 # R-Car V3U |
| - renesas,tmu-r8a779f0 # R-Car S4-8 |
| - renesas,tmu-r8a779g0 # R-Car V4H |
| - renesas,tmu-r8a779h0 # R-Car V4M |
| - const: renesas,tmu |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: |
| minItems: 2 |
| items: |
| - description: Underflow interrupt, channel 0 |
| - description: Underflow interrupt, channel 1 |
| - description: Underflow interrupt, channel 2 |
| - description: Input capture interrupt, channel 2 |
| |
| interrupt-names: |
| minItems: 2 |
| items: |
| - const: tuni0 |
| - const: tuni1 |
| - const: tuni2 |
| - const: ticpi2 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| const: fck |
| |
| power-domains: |
| maxItems: 1 |
| |
| resets: |
| maxItems: 1 |
| |
| '#renesas,channels': |
| description: |
| Number of channels implemented by the timer. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [ 2, 3 ] |
| default: 3 |
| |
| required: |
| - compatible |
| - reg |
| - interrupts |
| - interrupt-names |
| - clocks |
| - clock-names |
| - power-domains |
| |
| if: |
| not: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - renesas,tmu-r8a73a4 |
| - renesas,tmu-r8a7740 |
| - renesas,tmu-r8a7778 |
| - renesas,tmu-r8a7779 |
| then: |
| required: |
| - resets |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/r8a7779-clock.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/power/r8a7779-sysc.h> |
| tmu0: timer@ffd80000 { |
| compatible = "renesas,tmu-r8a7779", "renesas,tmu"; |
| reg = <0xffd80000 0x30>; |
| interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, |
| <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; |
| interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; |
| clocks = <&mstp0_clks R8A7779_CLK_TMU0>; |
| clock-names = "fck"; |
| power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; |
| #renesas,channels = <3>; |
| }; |