blob: 034cfd8aa95bff6215fe2433058c357e431c30ea [file] [log] [blame] [edit]
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* a3m071 board Device Tree Source
*
* Copyright 2012 Stefan Roese <sr@denx.de>
*
* Copyright (C) 2011 DENX Software Engineering GmbH
* Heiko Schocher <hs@denx.de>
*
* Copyright (C) 2007 Semihalf
* Marian Balakowicz <m8@semihalf.com>
*/
/include/ "mpc5200b.dtsi"
&gpt0 { fsl,has-wdt; };
/ {
model = "anonymous,a3m071";
compatible = "anonymous,a3m071";
soc5200@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc5200b-immr";
ranges = <0 0xf0000000 0x0000c000>;
reg = <0xf0000000 0x00000100>;
bus-frequency = <0>; /* From boot loader */
system-frequency = <0>; /* From boot loader */
spi@f00 {
status = "disabled";
};
usb: usb@1000 {
status = "disabled";
};
psc@2000 {
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2000 0x100>;
interrupts = <2 1 0>;
};
psc@2200 {
status = "disabled";
};
psc@2400 {
status = "disabled";
};
psc@2600 {
status = "disabled";
};
psc@2800 {
status = "disabled";
};
psc@2c00 { // PSC6
compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
reg = <0x2c00 0x100>;
interrupts = <2 4 0>;
};
ethernet@3000 {
phy-handle = <&phy0>;
};
mdio@3000 {
phy0: ethernet-phy@3 {
reg = <0x03>;
};
};
ata@3a00 {
status = "disabled";
};
i2c@3d00 {
status = "disabled";
};
i2c@3d40 {
status = "disabled";
};
};
localbus {
compatible = "fsl,mpc5200b-lpb","simple-bus";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0xfc000000 0x02000000
3 0 0xe9000000 0x00080000
5 0 0xe8000000 0x00010000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x0 0x02000000>;
compatible = "cfi-flash";
bank-width = <2>;
partition@0 {
label = "u-boot";
reg = <0x00000000 0x00040000>;
read-only;
};
partition@40000 {
label = "env";
reg = <0x00040000 0x00020000>;
};
partition@60000 {
label = "dtb";
reg = <0x00060000 0x00020000>;
};
partition@80000 {
label = "kernel";
reg = <0x00080000 0x00500000>;
};
partition@580000 {
label = "root";
reg = <0x00580000 0x00A80000>;
};
};
fpga@3,0 {
compatible = "anonymous,a3m071-fpga";
reg = <3 0x0 0x00080000
5 0x0 0x00010000>;
interrupts = <0 0 3>; /* level low */
};
};
pci@f0000d00 {
status = "disabled";
};
};