| /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| * |
| * Copyright (C) 2018 Icenowy Zheng <icenowy@aosc.xyz> |
| * |
| */ |
| |
| #ifndef _DT_BINDINGS_RST_SUNIV_F1C100S_H_ |
| #define _DT_BINDINGS_RST_SUNIV_F1C100S_H_ |
| |
| #define RST_USB_PHY0 0 |
| #define RST_BUS_DMA 1 |
| #define RST_BUS_MMC0 2 |
| #define RST_BUS_MMC1 3 |
| #define RST_BUS_DRAM 4 |
| #define RST_BUS_SPI0 5 |
| #define RST_BUS_SPI1 6 |
| #define RST_BUS_OTG 7 |
| #define RST_BUS_VE 8 |
| #define RST_BUS_LCD 9 |
| #define RST_BUS_DEINTERLACE 10 |
| #define RST_BUS_CSI 11 |
| #define RST_BUS_TVD 12 |
| #define RST_BUS_TVE 13 |
| #define RST_BUS_DE_BE 14 |
| #define RST_BUS_DE_FE 15 |
| #define RST_BUS_CODEC 16 |
| #define RST_BUS_SPDIF 17 |
| #define RST_BUS_IR 18 |
| #define RST_BUS_RSB 19 |
| #define RST_BUS_I2S0 20 |
| #define RST_BUS_I2C0 21 |
| #define RST_BUS_I2C1 22 |
| #define RST_BUS_I2C2 23 |
| #define RST_BUS_UART0 24 |
| #define RST_BUS_UART1 25 |
| #define RST_BUS_UART2 26 |
| |
| #endif /* _DT_BINDINGS_RST_SUNIV_F1C100S_H_ */ |
