Documentation/devicetree/bindings/mfd/max77620.txt - linux - Git at Google

 MAX77620 Power management IC from Maxim Semiconductor.

 Required properties:
 -------------------
 - compatible: Must be one of
 		"maxim,max77620"
 		"maxim,max20024"
 		"maxim,max77663"
 - reg: I2C device address.

 Optional properties:
 -------------------
 - interrupts:		The interrupt on the parent the controller is
 			connected to.
 - interrupt-controller: Marks the device node as an interrupt controller.
 - #interrupt-cells:	is <2> and their usage is compliant to the 2 cells
 			variant of <../interrupt-controller/interrupts.txt>
 			IRQ numbers for different interrupt source of MAX77620
 			are defined at dt-bindings/mfd/max77620.h.

 - system-power-controller: Indicates that this PMIC is controlling the
 			   system power, see [1] for more details.

 [1] Documentation/devicetree/bindings/power/power-controller.txt

 Optional subnodes and their properties:
 =======================================

 Flexible power sequence configurations:
 --------------------------------------
 The Flexible Power Sequencer (FPS) allows each regulator to power up under
 hardware or software control. Additionally, each regulator can power on
 independently or among a group of other regulators with an adjustable power-up
 and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
 to be part of a sequence allowing external regulators to be sequenced along
 with internal regulators. 32KHz clock can be programmed to be part of a
 sequence.

 The flexible sequencing structure consists of two hardware enable inputs
 (EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
 Each master sequencing timer is programmable through its configuration
 register to have a hardware enable source (EN1 or EN2) or a software enable
 source (SW). When enabled/disabled, the master sequencing timer generates
 eight sequencing events on different time periods called slots. The time
 period between each event is programmable within the configuration register.
 Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
 sequence slave register which allows its enable source to be specified as
 a flexible power sequencer timer or a software bit. When a FPS source of
 regulators, GPIOs and clocks specifies the enable source to be a flexible
 power sequencer, the power up and power down delays can be specified in
 the regulators, GPIOs and clocks flexible power sequencer configuration
 registers.

 When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
 clock are set into following state at the sequencing event that
 corresponds to its flexible sequencer configuration register.
 	Sleep state: 			In this state, regulators, GPIOs
 					and 32KHz clock get disabled at
 					the sequencing event.
 	Global Low Power Mode (GLPM):	In this state, regulators are set in
 					low power mode at the sequencing event.

 The configuration parameters of FPS is provided through sub-node "fps"
 and their child for FPS specific. The child node name for FPS are "fps0",
 "fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.

 The FPS configurations like FPS source, power up and power down slots for
 regulators, GPIOs and 32kHz clocks are provided in their respective
 configuration nodes which is explained in respective sub-system DT
 binding document.

 There is need for different FPS configuration parameters based on system
 state like when system state changed from active to suspend or active to
 power off (shutdown).

 Optional properties:
 -------------------
 -maxim,fps-event-source:		u32, FPS event source like external
 					hardware input to PMIC i.e. EN0, EN1 or
 					software (SW).
 					The macros are defined on
 						dt-bindings/mfd/max77620.h
 					for different control source.
 					- MAX77620_FPS_EVENT_SRC_EN0
 						for hardware input pin EN0.
 					- MAX77620_FPS_EVENT_SRC_EN1
 						for hardware input pin EN1.
 					- MAX77620_FPS_EVENT_SRC_SW
 						for software control.

 -maxim,shutdown-fps-time-period-us:	u32, FPS time period in microseconds
 					when system enters in to shutdown
 					state.

 -maxim,suspend-fps-time-period-us:	u32, FPS time period in microseconds
 					when system enters in to suspend state.

 -maxim,device-state-on-disabled-event:	u32, describe the PMIC state when FPS
 					event cleared (set to LOW) whether it
 					should go to sleep state or low-power
 					state. Following are valid values:
 					- MAX77620_FPS_INACTIVE_STATE_SLEEP
 						to set the PMIC state to sleep.
 					- MAX77620_FPS_INACTIVE_STATE_LOW_POWER
 						to set the PMIC state to low
 						power.
 					Absence of this property or other value
 					will not change device state when FPS
 					event get cleared.

 Here supported time periods by device in microseconds are as follows:
 MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
 MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
 MAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.

 -maxim,power-ok-control: configure map power ok bit
 			1: Enables POK(Power OK) to control nRST_IO and GPIO1
 			POK function.
 			0: Disables POK control.
 			if property missing, do not configure MPOK bit.
 			If POK mapping is enabled for GPIO1/nRST_IO then,
 			GPIO1/nRST_IO pins are HIGH only if all rails
 			that have POK control enabled are HIGH.
 			If any of the rails goes down(which are enabled for POK
 			control) then, GPIO1/nRST_IO goes LOW.
 			this property is valid for max20024 only.

 For DT binding details of different sub modules like GPIO, pincontrol,
 regulator, power, please refer respective device-tree binding document
 under their respective sub-system directories.

 Example:
 --------
 #include <dt-bindings/mfd/max77620.h>

 max77620@3c {
 	compatible = "maxim,max77620";
 	reg = <0x3c>;

 	interrupt-parent = <&intc>;
 	interrupts = <0 86 IRQ_TYPE_NONE>;

 	interrupt-controller;
 	#interrupt-cells = <2>;

 	fps {
 		fps0 {
 			maxim,shutdown-fps-time-period-us = <1280>;
 			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
 		};

 		fps1 {
 			maxim,shutdown-fps-time-period-us = <1280>;
 			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
 		};

 		fps2 {
 			maxim,shutdown-fps-time-period-us = <1280>;
 			maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
 		};
 	};
 };
	MAX77620 Power management IC from Maxim Semiconductor.

	Required properties:
	-------------------
	- compatible: Must be one of
	"maxim,max77620"
	"maxim,max20024"
	"maxim,max77663"
	- reg: I2C device address.

	Optional properties:
	-------------------
	- interrupts: The interrupt on the parent the controller is
	connected to.
	- interrupt-controller: Marks the device node as an interrupt controller.
	- #interrupt-cells: is <2> and their usage is compliant to the 2 cells
	variant of <../interrupt-controller/interrupts.txt>
	IRQ numbers for different interrupt source of MAX77620
	are defined at dt-bindings/mfd/max77620.h.

	- system-power-controller: Indicates that this PMIC is controlling the
	system power, see [1] for more details.

	[1] Documentation/devicetree/bindings/power/power-controller.txt

	Optional subnodes and their properties:
	=======================================

	Flexible power sequence configurations:
	--------------------------------------
	The Flexible Power Sequencer (FPS) allows each regulator to power up under
	hardware or software control. Additionally, each regulator can power on
	independently or among a group of other regulators with an adjustable power-up
	and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed
	to be part of a sequence allowing external regulators to be sequenced along
	with internal regulators. 32KHz clock can be programmed to be part of a
	sequence.

	The flexible sequencing structure consists of two hardware enable inputs
	(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2.
	Each master sequencing timer is programmable through its configuration
	register to have a hardware enable source (EN1 or EN2) or a software enable
	source (SW). When enabled/disabled, the master sequencing timer generates
	eight sequencing events on different time periods called slots. The time
	period between each event is programmable within the configuration register.
	Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power
	sequence slave register which allows its enable source to be specified as
	a flexible power sequencer timer or a software bit. When a FPS source of
	regulators, GPIOs and clocks specifies the enable source to be a flexible
	power sequencer, the power up and power down delays can be specified in
	the regulators, GPIOs and clocks flexible power sequencer configuration
	registers.

	When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz
	clock are set into following state at the sequencing event that
	corresponds to its flexible sequencer configuration register.
	Sleep state: In this state, regulators, GPIOs
	and 32KHz clock get disabled at
	the sequencing event.
	Global Low Power Mode (GLPM): In this state, regulators are set in
	low power mode at the sequencing event.

	The configuration parameters of FPS is provided through sub-node "fps"
	and their child for FPS specific. The child node name for FPS are "fps0",
	"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively.

	The FPS configurations like FPS source, power up and power down slots for
	regulators, GPIOs and 32kHz clocks are provided in their respective
	configuration nodes which is explained in respective sub-system DT
	binding document.

	There is need for different FPS configuration parameters based on system
	state like when system state changed from active to suspend or active to
	power off (shutdown).

	Optional properties:
	-------------------
	-maxim,fps-event-source: u32, FPS event source like external
	hardware input to PMIC i.e. EN0, EN1 or
	software (SW).
	The macros are defined on
	dt-bindings/mfd/max77620.h
	for different control source.
	- MAX77620_FPS_EVENT_SRC_EN0
	for hardware input pin EN0.
	- MAX77620_FPS_EVENT_SRC_EN1
	for hardware input pin EN1.
	- MAX77620_FPS_EVENT_SRC_SW
	for software control.

	-maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds
	when system enters in to shutdown
	state.

	-maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds
	when system enters in to suspend state.

	-maxim,device-state-on-disabled-event: u32, describe the PMIC state when FPS
	event cleared (set to LOW) whether it
	should go to sleep state or low-power
	state. Following are valid values:
	- MAX77620_FPS_INACTIVE_STATE_SLEEP
	to set the PMIC state to sleep.
	- MAX77620_FPS_INACTIVE_STATE_LOW_POWER
	to set the PMIC state to low
	power.
	Absence of this property or other value
	will not change device state when FPS
	event get cleared.

	Here supported time periods by device in microseconds are as follows:
	MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds.
	MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.
	MAX77663 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds.

	-maxim,power-ok-control: configure map power ok bit
	1: Enables POK(Power OK) to control nRST_IO and GPIO1
	POK function.
	0: Disables POK control.
	if property missing, do not configure MPOK bit.
	If POK mapping is enabled for GPIO1/nRST_IO then,
	GPIO1/nRST_IO pins are HIGH only if all rails
	that have POK control enabled are HIGH.
	If any of the rails goes down(which are enabled for POK
	control) then, GPIO1/nRST_IO goes LOW.
	this property is valid for max20024 only.

	For DT binding details of different sub modules like GPIO, pincontrol,
	regulator, power, please refer respective device-tree binding document
	under their respective sub-system directories.

	Example:
	--------
	#include <dt-bindings/mfd/max77620.h>

	max77620@3c {
	compatible = "maxim,max77620";
	reg = <0x3c>;

	interrupt-parent = <&intc>;
	interrupts = <0 86 IRQ_TYPE_NONE>;

	interrupt-controller;
	#interrupt-cells = <2>;

	fps {
	fps0 {
	maxim,shutdown-fps-time-period-us = <1280>;
	maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
	};

	fps1 {
	maxim,shutdown-fps-time-period-us = <1280>;
	maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
	};

	fps2 {
	maxim,shutdown-fps-time-period-us = <1280>;
	maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>;
	};
	};
	};