| * Oxford Semiconductor OXNAS NAND Controller |
| |
| Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings. |
| |
| Required properties: |
| - compatible: "oxsemi,ox820-nand" |
| - reg: Base address and length for NAND mapped memory. |
| |
| Optional Properties: |
| - clocks: phandle to the NAND gate clock if needed. |
| - resets: phandle to the NAND reset control if needed. |
| |
| Example: |
| |
| nandc: nand-controller@41000000 { |
| compatible = "oxsemi,ox820-nand"; |
| reg = <0x41000000 0x100000>; |
| clocks = <&stdclk CLK_820_NAND>; |
| resets = <&reset RESET_NAND>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| nand@0 { |
| reg = <0>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| nand-ecc-mode = "soft"; |
| nand-ecc-algo = "hamming"; |
| |
| partition@0 { |
| label = "boot"; |
| reg = <0x00000000 0x00e00000>; |
| read-only; |
| }; |
| |
| partition@e00000 { |
| label = "ubi"; |
| reg = <0x00e00000 0x07200000>; |
| }; |
| }; |
| }; |
