| # SPDX-License-Identifier: GPL-2.0 |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Allwinner A10 TCON Channel 0 Clock |
| |
| maintainers: |
| - Chen-Yu Tsai <wens@csie.org> |
| - Maxime Ripard <mripard@kernel.org> |
| |
| deprecated: true |
| |
| properties: |
| "#clock-cells": |
| const: 0 |
| |
| "#reset-cells": |
| const: 1 |
| |
| compatible: |
| enum: |
| - allwinner,sun4i-a10-tcon-ch0-clk |
| - allwinner,sun4i-a10-tcon-ch1-clk |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 4 |
| description: > |
| The parent order must match the hardware programming order. |
| |
| clock-output-names: |
| maxItems: 1 |
| |
| required: |
| - "#clock-cells" |
| - compatible |
| - reg |
| - clocks |
| - clock-output-names |
| |
| if: |
| properties: |
| compatible: |
| contains: |
| const: allwinner,sun4i-a10-tcon-ch0-clk |
| |
| then: |
| required: |
| - "#reset-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| clk@1c20118 { |
| #clock-cells = <0>; |
| #reset-cells = <1>; |
| compatible = "allwinner,sun4i-a10-tcon-ch0-clk"; |
| reg = <0x01c20118 0x4>; |
| clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; |
| clock-output-names = "tcon-ch0-sclk"; |
| }; |
| |
| - | |
| clk@1c2012c { |
| #clock-cells = <0>; |
| compatible = "allwinner,sun4i-a10-tcon-ch1-clk"; |
| reg = <0x01c2012c 0x4>; |
| clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>; |
| clock-output-names = "tcon-ch1-sclk"; |
| }; |
| |
| ... |
