| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Mediatek ethsys controller |
| |
| description: |
| The available clocks are defined in dt-bindings/clock/mt*-clk.h. |
| |
| maintainers: |
| - James Liao <jamesjj.liao@mediatek.com> |
| |
| properties: |
| compatible: |
| oneOf: |
| - items: |
| - enum: |
| - mediatek,mt2701-ethsys |
| - mediatek,mt7622-ethsys |
| - mediatek,mt7629-ethsys |
| - mediatek,mt7981-ethsys |
| - mediatek,mt7986-ethsys |
| - mediatek,mt7988-ethsys |
| - const: syscon |
| - items: |
| - const: mediatek,mt7623-ethsys |
| - const: mediatek,mt2701-ethsys |
| - const: syscon |
| |
| reg: |
| maxItems: 1 |
| |
| "#clock-cells": |
| const: 1 |
| |
| "#reset-cells": |
| const: 1 |
| |
| required: |
| - reg |
| - "#clock-cells" |
| - "#reset-cells" |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| clock-controller@1b000000 { |
| compatible = "mediatek,mt2701-ethsys", "syscon"; |
| reg = <0x1b000000 0x1000>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |