Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JH7110 System Clock and Reset Generator

maintainers:
  - Emil Renner Berthing <kernel@esmil.dk>

properties:
  compatible:
    const: starfive,jh7110-syscrg

  reg:
    maxItems: 1

  clocks:
    oneOf:
      - items:
          - description: Main Oscillator (24 MHz)
          - description: GMAC1 RMII reference or GMAC1 RGMII RX
          - description: External I2S TX bit clock
          - description: External I2S TX left/right channel clock
          - description: External I2S RX bit clock
          - description: External I2S RX left/right channel clock
          - description: External TDM clock
          - description: External audio master clock
          - description: PLL0
          - description: PLL1
          - description: PLL2

      - items:
          - description: Main Oscillator (24 MHz)
          - description: GMAC1 RMII reference
          - description: GMAC1 RGMII RX
          - description: External I2S TX bit clock
          - description: External I2S TX left/right channel clock
          - description: External I2S RX bit clock
          - description: External I2S RX left/right channel clock
          - description: External TDM clock
          - description: External audio master clock
          - description: PLL0
          - description: PLL1
          - description: PLL2

  clock-names:
    oneOf:
      - items:
          - const: osc
          - enum:
              - gmac1_rmii_refin
              - gmac1_rgmii_rxin
          - const: i2stx_bclk_ext
          - const: i2stx_lrck_ext
          - const: i2srx_bclk_ext
          - const: i2srx_lrck_ext
          - const: tdm_ext
          - const: mclk_ext
          - const: pll0_out
          - const: pll1_out
          - const: pll2_out

      - items:
          - const: osc
          - const: gmac1_rmii_refin
          - const: gmac1_rgmii_rxin
          - const: i2stx_bclk_ext
          - const: i2stx_lrck_ext
          - const: i2srx_bclk_ext
          - const: i2srx_lrck_ext
          - const: tdm_ext
          - const: mclk_ext
          - const: pll0_out
          - const: pll1_out
          - const: pll2_out

  '#clock-cells':
    const: 1
    description:
      See <dt-bindings/clock/starfive,jh7110-crg.h> for valid indices.

  '#reset-cells':
    const: 1
    description:
      See <dt-bindings/reset/starfive,jh7110-crg.h> for valid indices.

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - '#clock-cells'
  - '#reset-cells'

additionalProperties: false

examples:
  - |
    clock-controller@13020000 {
        compatible = "starfive,jh7110-syscrg";
        reg = <0x13020000 0x10000>;
        clocks = <&osc>, <&gmac1_rmii_refin>,
                 <&gmac1_rgmii_rxin>,
                 <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
                 <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
                 <&tdm_ext>, <&mclk_ext>,
                 <&pllclk 0>, <&pllclk 1>, <&pllclk 2>;
        clock-names = "osc", "gmac1_rmii_refin",
                      "gmac1_rgmii_rxin",
                      "i2stx_bclk_ext", "i2stx_lrck_ext",
                      "i2srx_bclk_ext", "i2srx_lrck_ext",
                      "tdm_ext", "mclk_ext",
                      "pll0_out", "pll1_out", "pll2_out";
        #clock-cells = <1>;
        #reset-cells = <1>;
    };