Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: HPE GXP SoC I2C Controller

maintainers:
  - Nick Hawkins <nick.hawkins@hpe.com>

allOf:
  - $ref: /schemas/i2c/i2c-controller.yaml#

properties:
  compatible:
    const: hpe,gxp-i2c

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clock-frequency:
    default: 100000

  hpe,sysreg:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the global status and enable interrupt registers shared
      between each I2C engine controller instance. It enables the I2C
      engine controller to act as both a master or slave by being able to
      arm and respond to interrupts from its engine. Each bit in the
      registers represent the respective bit position.

required:
  - compatible
  - reg
  - interrupts

unevaluatedProperties: false

examples:
  - |
    i2c@2600 {
        compatible = "hpe,gxp-i2c";
        reg = <0x2500 0x70>;
        interrupts = <9>;
        #address-cells = <1>;
        #size-cells = <0>;
        hpe,sysreg = <&sysreg_system_controller>;
        clock-frequency = <10000>;

        eeprom@50 {
            compatible = "atmel,24c128";
            reg = <0x50>;
        };
    };