| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NVIDIA Tegra Video Decoder Engine |
| |
| maintainers: |
| - Dmitry Osipenko <digetx@gmail.com> |
| - Jon Hunter <jonathanh@nvidia.com> |
| - Thierry Reding <thierry.reding@gmail.com> |
| |
| properties: |
| compatible: |
| oneOf: |
| - items: |
| - enum: |
| - nvidia,tegra132-vde |
| - nvidia,tegra124-vde |
| - nvidia,tegra114-vde |
| - items: |
| - const: nvidia,tegra30-vde |
| - const: nvidia,tegra20-vde |
| - items: |
| - const: nvidia,tegra20-vde |
| |
| reg: |
| maxItems: 9 |
| |
| reg-names: |
| items: |
| - const: sxe |
| - const: bsev |
| - const: mbe |
| - const: ppe |
| - const: mce |
| - const: tfe |
| - const: ppb |
| - const: vdma |
| - const: frameid |
| |
| clocks: |
| maxItems: 1 |
| |
| resets: |
| maxItems: 2 |
| |
| reset-names: |
| items: |
| - const: vde |
| - const: mc |
| |
| interrupts: |
| maxItems: 3 |
| |
| interrupt-names: |
| items: |
| - const: sync-token |
| - const: bsev |
| - const: sxe |
| |
| iommus: |
| maxItems: 1 |
| |
| iram: |
| $ref: /schemas/types.yaml#/definitions/phandle |
| description: |
| Phandle of the SRAM MMIO node. |
| |
| operating-points-v2: |
| description: |
| Should contain freqs and voltages and opp-supported-hw property, |
| which is a bitfield indicating SoC speedo or process ID mask. |
| |
| power-domains: |
| maxItems: 1 |
| description: |
| Phandle to the SoC core power domain. |
| |
| required: |
| - compatible |
| - reg |
| - reg-names |
| - clocks |
| - resets |
| - reset-names |
| - interrupts |
| - interrupt-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| video-codec@6001a000 { |
| compatible = "nvidia,tegra20-vde"; |
| reg = <0x6001a000 0x1000>, /* Syntax Engine */ |
| <0x6001b000 0x1000>, /* Video Bitstream Engine */ |
| <0x6001c000 0x100>, /* Macroblock Engine */ |
| <0x6001c200 0x100>, /* Post-processing Engine */ |
| <0x6001c400 0x100>, /* Motion Compensation Engine */ |
| <0x6001c600 0x100>, /* Transform Engine */ |
| <0x6001c800 0x100>, /* Pixel prediction block */ |
| <0x6001ca00 0x100>, /* Video DMA */ |
| <0x6001d800 0x300>; /* Video frame controls */ |
| reg-names = "sxe", "bsev", "mbe", "ppe", "mce", |
| "tfe", "ppb", "vdma", "frameid"; |
| iram = <&iram>; /* IRAM MMIO region */ |
| interrupts = <0 9 4>, /* Sync token */ |
| <0 10 4>, /* BSE-V */ |
| <0 12 4>; /* SXE */ |
| interrupt-names = "sync-token", "bsev", "sxe"; |
| clocks = <&clk 61>; |
| reset-names = "vde", "mc"; |
| resets = <&rst 61>, <&mem 13>; |
| iommus = <&mem 15>; |
| operating-points-v2 = <&dvfs_opp_table>; |
| power-domains = <&domain>; |
| }; |
