| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: STMicroelectronics STM32 Timers |
| |
| description: | |
| This hardware block provides 3 types of timer along with PWM functionality: |
| - advanced-control timers consist of a 16-bit auto-reload counter driven |
| by a programmable prescaler, break input feature, PWM outputs and |
| complementary PWM outputs channels. |
| - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter |
| driven by a programmable prescaler and PWM outputs. |
| - basic timers consist of a 16-bit auto-reload counter driven by a |
| programmable prescaler. |
| |
| maintainers: |
| - Fabrice Gasnier <fabrice.gasnier@foss.st.com> |
| |
| properties: |
| compatible: |
| const: st,stm32-timers |
| |
| reg: |
| maxItems: 1 |
| |
| clocks: |
| maxItems: 1 |
| |
| clock-names: |
| items: |
| - const: int |
| |
| resets: |
| maxItems: 1 |
| |
| dmas: |
| minItems: 1 |
| maxItems: 7 |
| |
| dma-names: |
| items: |
| enum: [ ch1, ch2, ch3, ch4, up, trig, com ] |
| minItems: 1 |
| maxItems: 7 |
| |
| interrupts: |
| oneOf: |
| - maxItems: 1 |
| - maxItems: 4 |
| |
| interrupt-names: |
| oneOf: |
| - items: |
| - const: global |
| - items: |
| - const: brk |
| - const: up |
| - const: trg-com |
| - const: cc |
| |
| "#address-cells": |
| const: 1 |
| |
| "#size-cells": |
| const: 0 |
| |
| access-controllers: |
| minItems: 1 |
| maxItems: 2 |
| |
| pwm: |
| type: object |
| additionalProperties: false |
| |
| properties: |
| compatible: |
| const: st,stm32-pwm |
| |
| "#pwm-cells": |
| const: 3 |
| |
| st,breakinput: |
| description: |
| One or two <index level filter> to describe break input |
| configurations. |
| $ref: /schemas/types.yaml#/definitions/uint32-matrix |
| items: |
| items: |
| - description: | |
| "index" indicates on which break input (0 or 1) the |
| configuration should be applied. |
| enum: [0, 1] |
| - description: | |
| "level" gives the active level (0=low or 1=high) of the |
| input signal for this configuration |
| enum: [0, 1] |
| - description: | |
| "filter" gives the filtering value (up to 15) to be applied. |
| maximum: 15 |
| minItems: 1 |
| maxItems: 2 |
| |
| required: |
| - "#pwm-cells" |
| - compatible |
| |
| counter: |
| type: object |
| additionalProperties: false |
| |
| properties: |
| compatible: |
| const: st,stm32-timer-counter |
| |
| required: |
| - compatible |
| |
| patternProperties: |
| "^timer@[0-9]+$": |
| type: object |
| additionalProperties: false |
| |
| properties: |
| compatible: |
| enum: |
| - st,stm32-timer-trigger |
| - st,stm32h7-timer-trigger |
| |
| reg: |
| description: Identify trigger hardware block. |
| items: |
| minimum: 0 |
| maximum: 16 |
| |
| required: |
| - compatible |
| - reg |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| - clock-names |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/stm32mp1-clks.h> |
| timers2: timer@40000000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "st,stm32-timers"; |
| reg = <0x40000000 0x400>; |
| clocks = <&rcc TIM2_K>; |
| clock-names = "int"; |
| dmas = <&dmamux1 18 0x400 0x1>, |
| <&dmamux1 19 0x400 0x1>, |
| <&dmamux1 20 0x400 0x1>, |
| <&dmamux1 21 0x400 0x1>, |
| <&dmamux1 22 0x400 0x1>; |
| dma-names = "ch1", "ch2", "ch3", "ch4", "up"; |
| pwm { |
| compatible = "st,stm32-pwm"; |
| #pwm-cells = <3>; |
| st,breakinput = <0 1 5>; |
| }; |
| timer@1 { |
| compatible = "st,stm32-timer-trigger"; |
| reg = <1>; |
| }; |
| counter { |
| compatible = "st,stm32-timer-counter"; |
| }; |
| }; |
| |
| ... |
