| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Qualcomm IPQ40xx MDIO Controller |
| |
| maintainers: |
| - Robert Marko <robert.marko@sartura.hr> |
| |
| properties: |
| compatible: |
| oneOf: |
| - enum: |
| - qcom,ipq4019-mdio |
| - qcom,ipq5018-mdio |
| |
| - items: |
| - enum: |
| - qcom,ipq6018-mdio |
| - qcom,ipq8074-mdio |
| - qcom,ipq9574-mdio |
| - const: qcom,ipq4019-mdio |
| |
| "#address-cells": |
| const: 1 |
| |
| "#size-cells": |
| const: 0 |
| |
| reg: |
| minItems: 1 |
| maxItems: 2 |
| description: |
| the first Address and length of the register set for the MDIO controller. |
| the second Address and length of the register for ethernet LDO, this second |
| address range is only required by the platform IPQ50xx. |
| |
| clocks: |
| items: |
| - description: MDIO clock source frequency fixed to 100MHZ |
| |
| clock-names: |
| items: |
| - const: gcc_mdio_ahb_clk |
| |
| clock-frequency: |
| description: |
| The MDIO bus clock that must be output by the MDIO bus hardware, if |
| absent, the default hardware values are used. |
| |
| MDC rate is feed by an external clock (fixed 100MHz) and is divider |
| internally. The default divider is /256 resulting in the default rate |
| applied of 390KHz. |
| |
| To follow 802.3 standard that instruct up to 2.5MHz by default, if |
| this property is not declared and the divider is set to /256, by |
| default 1.5625Mhz is select. |
| enum: [ 390625, 781250, 1562500, 3125000, 6250000, 12500000 ] |
| default: 1562500 |
| |
| required: |
| - compatible |
| - reg |
| - "#address-cells" |
| - "#size-cells" |
| |
| allOf: |
| - $ref: mdio.yaml# |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - qcom,ipq5018-mdio |
| - qcom,ipq6018-mdio |
| - qcom,ipq8074-mdio |
| - qcom,ipq9574-mdio |
| then: |
| required: |
| - clocks |
| - clock-names |
| else: |
| properties: |
| clocks: false |
| clock-names: false |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| mdio@90000 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "qcom,ipq4019-mdio"; |
| reg = <0x90000 0x64>; |
| |
| ethphy0: ethernet-phy@0 { |
| reg = <0>; |
| }; |
| |
| ethphy1: ethernet-phy@1 { |
| reg = <1>; |
| }; |
| |
| ethphy2: ethernet-phy@2 { |
| reg = <2>; |
| }; |
| |
| ethphy3: ethernet-phy@3 { |
| reg = <3>; |
| }; |
| |
| ethphy4: ethernet-phy@4 { |
| reg = <4>; |
| }; |
| }; |