Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments K3 SoC Watchdog Timer

maintainers:
  - Tero Kristo <t-kristo@ti.com>

description:
  The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
  Interrupt) IP module. This timer adds a support for windowed watchdog
  mode, which will signal an error if it is pinged outside the watchdog
  time window, meaning either too early or too late. The error signal
  generated can be routed to either interrupt a safety controller or
  to directly reset the SoC.

allOf:
  - $ref: watchdog.yaml#

properties:
  compatible:
    enum:
      - ti,j7-rti-wdt

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  power-domains:
    maxItems: 1

  memory-region:
    maxItems: 1
    description:
      Contains the watchdog reserved memory. It is optional.
      In the reserved memory, the specified values, which are
      PON_REASON_SOF_NUM(0xBBBBCCCC), PON_REASON_MAGIC_NUM(0xDDDDDDDD),
      and PON_REASON_EOF_NUM(0xCCCCBBBB), are pre-stored at the first
      3 * 4 bytes to tell that last boot was caused by watchdog reset.
      Once the PON reason is captured by driver(rti_wdt.c), the driver
      is supposed to wipe the whole memory region. Surely, if this
      property is set, at least 12 bytes reserved memory starting from
      specific memory address(0xa220000) should be set. More please
      refer to example.

required:
  - compatible
  - reg
  - clocks
  - power-domains

unevaluatedProperties: false

examples:
  - |
    /*
     * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
     * select the source clock for the watchdog, forcing it to tick with
     * a 32kHz clock in this case. Add a reserved memory(optional) to keep
     * the watchdog reset cause persistent, which was be written in 12 bytes
     * starting from 0xa2200000 by RTI Watchdog Firmware, then make it
     * possible to get watchdog reset cause in driver.
     *
     * Reserved memory should be defined as follows:
     * reserved-memory {
     *     wdt_reset_memory_region: wdt-memory@a2200000 {
     *         reg = <0x00 0xa2200000 0x00 0x1000>;
     *         no-map;
     *     };
     * }
     */
    #include <dt-bindings/soc/ti,sci_pm_domain.h>

    watchdog@2200000 {
        compatible = "ti,j7-rti-wdt";
        reg = <0x2200000 0x100>;
        clocks = <&k3_clks 252 1>;
        power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
        assigned-clocks = <&k3_clks 252 1>;
        assigned-clock-parents = <&k3_clks 252 5>;
        memory-region = <&wdt_reset_memory_region>;
    };