arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2019~2020, 2022 NXP
 */

&lsio_gpio0 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio1 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio2 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio3 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio4 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio5 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio6 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_gpio7 {
	compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
	interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_mu0 {
	compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_mu1 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
	interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_mu2 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
	interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_mu3 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
	interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_mu4 {
	compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
	interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
};

&lsio_mu5 {
	compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
	interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
};