| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| %YAML 1.2 | |
| --- | |
| $id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml# | |
| $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| title: NXP System Counter Module(sys_ctr) | |
| maintainers: | |
| - Bai Ping <ping.bai@nxp.com> | |
| description: | | |
| The system counter(sys_ctr) is a programmable system counter | |
| which provides a shared time base to Cortex A15, A7, A53, A73, | |
| etc. it is intended for use in applications where the counter | |
| is always powered and support multiple, unrelated clocks. The | |
| compare frame inside can be used for timer purpose. | |
| properties: | |
| compatible: | |
| oneOf: | |
| - enum: | |
| - nxp,imx95-sysctr-timer | |
| - nxp,sysctr-timer | |
| - items: | |
| - enum: | |
| - nxp,imx94-sysctr-timer | |
| - const: nxp,imx95-sysctr-timer | |
| reg: | |
| maxItems: 1 | |
| interrupts: | |
| maxItems: 1 | |
| clocks: | |
| maxItems: 1 | |
| clock-names: | |
| const: per | |
| nxp,no-divider: | |
| description: if present, means there is no internal base clk divider. | |
| type: boolean | |
| required: | |
| - compatible | |
| - reg | |
| - interrupts | |
| - clocks | |
| - clock-names | |
| additionalProperties: false | |
| examples: | |
| - | | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| timer@306a0000 { | |
| compatible = "nxp,sysctr-timer"; | |
| reg = <0x306a0000 0x20000>; | |
| clocks = <&clk_8m>; | |
| clock-names = "per"; | |
| interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; | |
| }; |